Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With specified crystal plane or axis
Reexamination Certificate
2002-02-08
2003-09-16
Nhu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With specified crystal plane or axis
C257S777000
Reexamination Certificate
active
06621149
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor chip production method and a semiconductor wafer used in the production method, and, more particularly, to an effective technology for use in producing a rectangular semiconductor chip having a vertical dimension and a horizontal dimension which differ from each other.
2. Description of the Related Art
In a semiconductor process, many semiconductor devices which are arranged and disposed on a semiconductor wafer are formed at the same time by, for example, photolithography or vacuum deposition. Severing areas for splitting the semiconductor wafer are formed between the semiconductor devices. By vertically and horizontally cutting severing lines along the central portions of the corresponding severing areas by, for example, dicing, the semiconductor devices are separated from each other to form individual rectangular semiconductor chips.
In order to reduce the cost of the semiconductor chips, the area of each semiconductor chip is reduced. However, as the size of the semiconductor chips becomes smaller, the proportion of the area taken up by the severing areas with respect to the area of the semiconductor wafer increases. Therefore, in order to increase the number of semiconductor chips obtained from the semiconductor wafer, the severing areas need to be made narrower. However, the difficulty of making these severing areas narrower is becoming a problem.
In order to overcome this problem, Japanese Unexamined Patent Application Publication No. 11-233458 discloses a method of narrowing severing areas along long sides of semiconductor devices in order to increase the number of semiconductor chips obtained.
However, by using this method, the severing areas along the long sides of the semiconductor devices are narrowed with respect to the severing areas along short sides of the semiconductor devices. In this situation, the rectangular semiconductor chips obtained by separation from the semiconductor wafer have portions of the severing areas which remain after the severing areas are cut by dicing. Therefore, the ratio between the long sides and the short sides of the severed rectangular semiconductor chips is larger than the ratio between the long sides and the short sides of the semiconductor devices before severing. Consequently, the rectangular semiconductor chips become elongated, thereby resulting in the problem that the mechanical strength of the semiconductor chips becomes weak.
When the severing areas along the long sides of the semiconductor devices are disposed in a direction in which chipping of the semiconductor wafer tends to occur, since the width of the severing areas is small, the chipping reaches the semiconductor devices, thereby damaging the semiconductor devices. This has been a cause of the production of defective semiconductor chips.
SUMMARY OF THE INVENTION
In view of the above-described problems, the present invention provides a semiconductor chip production method and a semiconductor wafer used in the production method in order to overcome the above-described problems and to increase the number of rectangular semiconductor chips obtained from a rectangular semiconductor wafer without reducing the strength of the rectangular semiconductor chips.
To this end, according to one aspect of the present invention, there is provided a method of producing a rectangular semiconductor chip by severing, at severing areas along long sides and along short sides of a plurality of semiconductor devices, a semiconductor wafer having formed thereon the plurality of rectangular semiconductor devices, having the long sides and short sides, arranged in vertical and horizontal directions. The method comprises the steps of forming the short sides of the semiconductor devices on the semiconductor wafer parallel to a crystal orientation direction of the semiconductor wafer; and forming the severing areas along the short sides of the semiconductor devices so that widths thereof are smaller than widths of the severing areas along the long sides of the semiconductor devices.
According to another aspect of the present invention, there is provided a semiconductor wafer having formed thereon a plurality of rectangular semiconductor devices, having long and short sides, arranged in vertical and horizontal directions, and including severing areas along the long sides and the short sides of the semiconductor devices. In the semiconductor wafer, the short sides of the semiconductor devices are formed parallel to a crystal orientation direction of the semiconductor wafer, and widths of the severing areas along the short sides of the semiconductor devices are smaller than widths of the severing areas along the long sides of the semiconductor devices.
By virtue of these measures, when rectangular semiconductor chips are produced by separating the semiconductor devices arranged and disposed on the semiconductor wafer, the ratio between long sides and short sides of the semiconductor chips becomes smaller than the ratio between the long sides and the short sides of the unseparated semiconductor devices. Therefore, the mechanical strength of the semiconductor chips is not reduced. Consequently, when the semiconductor chips are mounted, it is possible to prevent cracking, chipping, or other defects in the semiconductor chips caused by mechanical stress.
By disposing the short sides of the semiconductor devices along a direction which is parallel to an orientation flat, which corresponds to a direction in which chipping of the semiconductor wafer does not easily occur, and by decreasing the widths of the severing areas which are provided along the short sides of the semiconductor devices, the areas of the severing areas of the semiconductor wafer can be made small, thereby making it possible to increase the number of semiconductor chips obtained from the semiconductor wafer.
Other features and advantages of the present invention will become apparent from the following description of embodiments of the invention which refers to the accompanying drawings.
REFERENCES:
patent: 4238848 (1980-12-01), Yamaguchi et al.
patent: 5153898 (1992-10-01), Suzuki et al.
patent: 5767571 (1998-06-01), Kimura et al.
patent: 6141034 (2000-10-01), McCutchen
patent: 11-233458 (1999-08-01), None
Keating & Bennett LLP
Murata Manufacturing Co. Ltd.
Nhu David
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