Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2000-05-05
2002-07-30
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S928000, C257S688000
Reexamination Certificate
active
06426242
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the packaging of a semiconductor chip, more specifically for assembly on a printed circuit board. The present invention applies to components for which it is necessary to provide at least one electric contact on the rear surface of the semiconductor chip.
2. Discussion of the Related Art
To continue the trend of electronic device miniaturization, it is attempted to reduce the bulk of a component, a non-negligible part of which is due to its protective package. This trend to miniaturize packaging has resulted, for integrated circuits, in attempting to eliminate packages based on an encapsulation, in a material such as an epoxy resin, of a chip placed on a connection grid. An example of a known technique consists of enclosing the chip between a silicon plate and a glass plate, and etching the glass plate to form openings enabling access to contacts at the so-called upper or front chip surface. This type of package is known as CSP and is presently only used for integrated circuits in which contacts are only provided at the front chip surface.
It would be desirable to be able to also take advantage of the progress of package miniaturization for chips having contacts on both surfaces.
SUMMARY OF THE INVENTION
Thus, an object of the present invention is to provide a novel method of packaging a semiconductor chip having contacts on both surfaces, which enables a transfer of the contacts onto a single surface of the package while reducing or minimizing the surface of this package.
The present invention also aims at providing a solution that enables obtaining a package of low height.
The present invention also aims at providing a solution that can be implemented for discrete components as well as for integrated circuits.
To achieve these and other objects, the present invention provides a method of packaging a chip formed in a semiconductor wafer and having electric contacts on both its surfaces, including the steps of providing, on a first surface of the wafer, at least one conductive area extending beyond the periphery of the chip to be formed; gluing a first thick plate including an electrically isolating material on the first surface; etching the wafer from its second surface to define chips; depositing at least one conductive track extending from a contact of the second chip surface to the conductive area; covering the second surface with a second thick plate forming a rigid cap with an interposed isolating filling material between the first and second plates; and etching the first plate at least above the conductive layer to deposit thereon a conductive material extending, in the form of a track, to the exposed surface of the first plate.
According to an embodiment of the present invention, the method further includes a final cutting step to separate the packages.
According to an embodiment of the present invention, the first isolating plate is thinned before being opened above the conductive area.
According to an embodiment of the present invention, the second surface of the wafer is thinned before the step of chip definition etching.
According to an embodiment of the present invention, the thickness of the second covering plate is chosen according to the desired mechanical bond of the package once completed.
According to an embodiment of the present invention, the etching of the first thick plate is performed according to a pattern of formation of two pads per chip.
According to an embodiment of the present invention, the contact transfer from the conductive area is performed in a separation area of the two pads, to the exposed surface of one of the pads.
According to an embodiment of the present invention, the second plate is made of an electrically isolating material.
According to an embodiment of the present invention, the second plate is, at least partially, made of a thermally conductive material.
The foregoing objects, features and advantages of the present invention, will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.
REFERENCES:
patent: 6326697 (2001-12-01), Farnworth
Berezny Nema
Morris James H.
Nguyen Tuan H.
STMicroelectronics S.A.
Wolf Greenfield & Sacks P.C.
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