Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2002-12-16
2008-07-15
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S692000, C257S778000, C257S784000
Reexamination Certificate
active
07400036
ABSTRACT:
A semiconductor chip package includes a package substrate having a first bond pad pattern. A semiconductor chip resides on the package substrate. The semiconductor chip has a second bond pad pattern. A lid cover houses the semiconductor chip and is fitted onto the package substrate. The second bond pattern of the semiconductor chip is connected to the first bond pattern of the package substrate through internal conductor traces of the lid cover.
REFERENCES:
patent: 5608262 (1997-03-01), Degani et al.
patent: 6084297 (2000-07-01), Brooks et al.
patent: 6166435 (2000-12-01), Leu et al.
patent: 6294839 (2001-09-01), Mess et al.
Avago Technologies General IP Pte Ltd
Vu Hung
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