Semiconductor chip package and method for making the same

Details Semiconductor chip package and method for making the same Semiconductor chip package and method for making the same

2006-05-09

2006-05-09

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S622000, C438S624000

Reexamination Certificate

active

07041534

ABSTRACT:
A semiconductor chip package mainly includes a semiconductor chip, a first dielectric layer disposed on the semiconductor chip, a plurality of conductive traces electrically connected to the semiconductor chip, a second dielectric layer disposed on the conductive traces and the first dielectric layer wherein a portion of the conductive traces are exposed from the second dielectric layer, and a plurality of contacts for external connection formed on the exposed portion of the conductive traces. The semiconductor chip has a surface including an active area, a dummy area surrounding the active area, and a plurality of bonding pads disposed on the active area. The bonding pads are electrically connected to the contacts by the conductive traces. The present invention further provides methods for manufacturing the semiconductor chip package.

REFERENCES:
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patent: 5834844 (1998-11-01), Akagawa et al.
patent: 5841193 (1998-11-01), Eichelberger
patent: 6153448 (2000-11-01), Takahashi et al.
patent: 6235552 (2001-05-01), Kwon et al.
patent: 6281046 (2001-08-01), Lam
patent: 6426545 (2002-07-01), Eichelberger et al.

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