Semiconductor chip package

Details Semiconductor chip package Semiconductor chip package

2008-06-11

2010-06-29

Trinh, Hoa B (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

With shielding

With means to shield device contained in housing or package...

C257S778000, C257SE23001

Reexamination Certificate

active

07745911

ABSTRACT:
A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.

REFERENCES:
patent: 6404052 (2002-06-01), Kurita et al.
patent: 6952049 (2005-10-01), Ogawa et al.
patent: 2001-319987 (2001-11-01), None
patent: 2002-0003610 (2002-01-01), None
patent: 10-2006-0100169 (2006-09-01), None
patent: 10-2007-0024794 (2007-03-01), None

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