Semiconductor chip mounting substrate, semiconductor chip...

Details Semiconductor chip mounting substrate, semiconductor chip... Semiconductor chip mounting substrate, semiconductor chip...

2008-02-14

2009-12-29

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C438S401000

Reexamination Certificate

active

07638888

ABSTRACT:
There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stacking which are provided around or in the connection region on the substrate, wherein a reinforcing member as a reinforcing region for reinforcing a portion between the plurality of alignment marks is provided on the substrate.

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patent: 2005/0051909 (2005-03-01), Inomata
patent: 2005/0110785 (2005-05-01), Ochiai et al.
patent: 2008/0284048 (2008-11-01), Kim et al.
patent: 63-201373 (1988-12-01), None
patent: 7-179088 (1995-07-01), None
patent: 9-186413 (1997-07-01), None
patent: 10-223999 (1998-08-01), None
patent: 2001-7460 (2001-01-01), None
patent: WO 2006/095703 (2006-09-01), None

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