Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2002-09-05
2004-12-28
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S758000, C257S734000, C257S735000
Reexamination Certificate
active
06836011
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a mounting structure for mounting a semiconductor chip on a wiring substrate such as a mother board, particularly to a semiconductor device in which thermal stress between the semiconductor chip and the mother board is absorbed to improve mounting reliability, and a manufacturing method thereof.
2. Description of the Related Art
A known flip chip connection structure includes a solder bump on a semiconductor chip that directly contacts a wiring land on a mother board, where the semiconductor chip is formed of silicon and is mounted on a wiring substrate, such as the mother board, that is primarily formed of resin, such as epoxy. The flip chip structure has a simple structure and is capable of easy mounting. However, because silicon and resin, whose coefficients of thermal expansion are different from each other, are directly connected, thermal stress occurs between the semiconductor chip and the mother board due to the difference of their coefficients of thermal expansion. The thermal stress is applied to the solder bump or the wiring land and causes a crack in the solder bump that breaks the connection of the semiconductor chip and breaks wire connections to the chip. To absorb such thermal stress, there has conventionally been proposed a structure in which underfill resin having a coefficient of thermal expansion, whose value is between those of silicon and resin, is filled between the semiconductor chip and the motherboard. However, using such an underfill resin causes a problem because the semiconductor chip cannot be removed for replacement.
For this reason, art to absorb thermal stress occurred between the semiconductor chip and the mother board without using the underfill resin is described, and Japanese Patent No. 2738711 proposes a structure as the wiring land of the mother board, where an electrode structure has free deformation characteristic and spring characteristic in horizontal directions, thermal stress is absorbed in such a manner that the thermal stress deforms the wiring land, and crack in the solder bump is prevented. A manufacturing method to realize the structure is that a lift off film is formed on the surface of the mother board, a metal film where the wiring land is formed is formed on the lift off film, and a pattern is formed on the metal film so as to have a bent shape or a curve shape in horizontal directions. Further, the wiring land, where a pattern is formed, has a structure that one end portion thereof is fixed to the motherboard, and the lift off film is etched and removed thereafter, so that the wiring land is formed as an electrode where the other end portion is in a floating state above the motherboard surface. Accordingly, since the wiring land to be formed, that is, the electrode is a cantilever electrode, whose one end portion is fixed and the other end portion is a free end in the floating state, thermal stress occurred is absorbed by deformation due to free deformation characteristic and spring characteristic of the electrode by bonding the solder bump of the semiconductor chip with the other end portion, and thus crack of the solder bump is prevented. The similar art is described in Japanese Patent Laid-open No. S63-177434, No. S64-50539, and No. H1-303731.
However, this art requires a process of forming the lift off film and removing it by etching in order to form the electrode in the floating state on the mother board surface, which makes a manufacturing process complicated. Further, since the other end portion of the electrode floats above the mother board surface, there is a danger that the electrode formed on the mother board surface may be deformed or broken when it touches other parts, foreign material, or the like. Furthermore, in the state where the semiconductor chip is bonded with the electrode of the floating structure by the solder bump, the semiconductor chip is in an unstable state for the motherboard due to elasticity of the electrode, and there is also a danger that the semiconductor chip easily drops from the motherboard by external force.
Moreover, although the wiring land of the mother board is formed as the electrode of the floating structure in the conventional art, the number of the wiring land is very large because of a large size of the mother board, which makes it difficult to preferably manufacturing all wiring lands, and thus there exists a problem that manufacturing yield is poor and the mother board becomes expensive as a result. Consequently, a structure is possible that the conventional wiring land structure is used for the mother board as it is, the semiconductor chip is mounted on a middle substrate referred to as an interposer, and the chip is mounted on the mother board via the interposer. For example, it is a structure as described in Japanese Patent Laid-open No. 2000-164635 in which the semiconductor chip is mounted on the interposer substrate and an electrode such as a solder ball is used as an external electrode. The interposer substrate is formed using a material having the same coefficient of thermal expansion as that of the mother board, an electrode structure is formed between the semiconductor chip and the interposer to absorb thermal stress, and thus eliminating thermal stress between the mother board and the interposer. With this art, since the structure to absorb thermal stress may be adopted only for the interposer, the manufacturing yield improves and the motherboard can be prevented from becoming expensive.
The art described in Japanese Patent Laid-open No. H1-155633,for example, is possible as the electrode structure to absorb thermal stress in the interposer substrate. In this art, an organic film with conductor is inserted between the semiconductor chip and the mother board, one end portion of the conductor provided for the organic film is connected with the solder ball of the semiconductor chip, and the other end portion of the conductor is connected with the wiring land of the mother board. Then, the conductor is formed in the cantilever structure so as to create spring characteristic, and it is possible to absorb thermal stress between the semiconductor chip and the wiring board.
However, in the art described in the gazette, because the structure of the conductor provided for the organic film with conductor is substantially same as the structure of the electrode of the floating structure, which has been applied for the mother board described in the foregoing gazette, it requires the manufacturing method by the lift off film and the manufacturing process becomes complicated. In addition, it is easily broken because the conductor has the floating structure, and the semiconductor chip is in the unstable state when it is mounted on the interposer due to elasticity of the conductor, and there is a danger that the semiconductor chip easily drops by external force.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device that can be easily manufactured and can stably hold the semiconductor chip while thermal stress occurred between the semiconductor chip and the substrate mounting the chip is absorbed, and a manufacturing method thereof.
A semiconductor device according to the present invention comprises: a first member having a first electrode; and a second member having an insulating substrate and a second electrode formed on the surface of the insulating substrate and connected with the first electrode. The second electrode is constituted as a connection electrode that is easily peeled off from the surface of the insulating substrate in a connection region with the first electrode than the other region.
As a first mode of the semiconductor device of the present invention, it is the semiconductor device that comprises: a semiconductor chip having a conductor bump; and a mounting substrate having an insulating substrate and a connection electrode formed on the surface of the insulating substrate and with which the conductor bump is connected. The c
Ha Nathan W.
NEC Electronics Corporation
Pham Long
Young & Thompson
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