Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-11-07
2001-11-13
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C228S180210, C257S779000, C257S781000, C257S693000, C361S772000, C361S773000
Reexamination Certificate
active
06316735
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the invention
The present invention relates to a semiconductor chip mounting board for mounting a semiconductor chip thereupon and for electrically connecting the semiconductor chip with a wiring pattern on a printed circuit board, and further relates to a semiconductor device using the same semiconductor chip mounting board. The present invention more particularly relates to a semiconductor chip mounting board which increases reliability of electrical connection between a semiconductor chip mounted thereupon and a wiring pattern on a printed circuit board.
2. Discussion of the Background
FIG. 9
is a perspective drawing schematically illustrating a positional relationship between a semiconductor chip, a semiconductor chip mounting board and a printed circuit board (hereinafter referred to as a PCB) in a related semiconductor device. After a semiconductor chip
101
is formed from a wafer through a process of dicing the wafer, the semiconductor chip
101
is mounted on a semiconductor chip mounting surface
106
of a semiconductor chip mounting board
102
in a predetermined position. Generally, a solder bump is formed on each electrode pad of the semiconductor chip
101
, and the solder bump is bonded with a corresponding lead wire formed on the semiconductor chip mounting surface
106
for electrical connection with the semiconductor chip
101
. The semiconductor chip mounting surface
106
on which the semiconductor chip
101
is mounted is then covered by a mold resin (not shown).
The semiconductor chip mounting board
102
includes a PCB facing surface
105
at the opposite side of the board from the semiconductor chip mounting surface
106
. The PCB facing surface
105
includes connecting pads, each of which is connected with the corresponding lead wire on the semiconductor chip mounting surface
106
via a through-hole. The semiconductor chip
101
and wiring patterns on a printed circuit board (PCB)
103
are electrically connected by bonding each of the solder bumps formed on the connecting pads of the PCB facing surface
105
of the semiconductor chip mounting board
102
with the corresponding wiring pattern on the PCB
103
.
When the PCB
103
and the semiconductor chip mounting board
102
are connected via solder bumps as described above, they are heated and then cooled, and the change in the temperature causes distortion or bending in the PCB
103
. Such distortion or bending in the PCB
103
causes cracking in the solder bumps between the connecting pads of the semiconductor chip mounting board
102
and the wiring patterns on the PCB
103
. Cracking in the solder bumps causes a break in electrical connection between the connecting pads of the semiconductor chip mounting board
102
and the wiring patterns on the PCB
103
, and as a result, a break in electrical connection between the semiconductor chip
101
and the wiring patterns on the PCB
103
occurs.
For solving the aforementioned problem, a related technology in Japanese Laid-open Patent Publication No. 58-53837 proposes providing a semiconductor chip mounting board with connection reinforcing pads to which an electric current is not applied to. Such a connection reinforcing pad is provided at each corner of a semiconductor chip mounting board because, when distortion or bending is formed in a printed circuit board on which the semiconductor chip mounting board is mounted, a solder bump formed on a connecting pad at each corner of the semiconductor chip mounting board is generally most significantly affected by the distortion or bending of the printed circuit board, causing cracking in the solder bump.
In a related technology shown in Japanese Laid-open Patent Publication No. 61-224444, an electrode lead is formed on each connecting pad of a semiconductor chip, each extending 0.5 mm therefrom. The electrode lead is inserted in a solder hole provided in an electrode pad of a semiconductor chip mounting board and is then soldered therein. With this construction, even when a cracking force is applied to the solder bump, the force is neutralized by the electrode lead and a crack in the solder bump is prevented. In this publication, the technology is applied to enforcing connection between a semiconductor chip and a semiconductor chip mounting board, but the same technology can be applied to enforcing connection between a semiconductor chip mounting board and a printed circuit board.
In a related technology shown in U.S. Pat. No. 5,381,307, a connecting pad having a contact surface larger than a contact surface of other connecting pads is provided at each corner of a semiconductor chip mounting board. These connecting pads, each having a larger contact surface, are provided for the purpose of compensating a positional deviation between a connecting pad of the semiconductor chip mounting board and a corresponding wiring pattern on a printed circuit board through an effect of a surface tension of the solder bump formed on each of these connecting pads. In other words, the contact surface of the connecting pad at each corner of the semiconductor chip mounting board is not made larger for preventing a cracking in the solder bump formed on each of the connecting pads and connecting with the corresponding wiring pattern on the printed circuit board. Nevertheless, the solder bump on the connecting pad at each corner of the semiconductor mounting board is reinforced as a result of increasing the contact surface of the connecting pad.
In each of the technologies respectively shown in Japanese Laid-open Patent Publication No. 58-53837 and U.S. Pat. No. 5,381,307, the solder bump formed on the connecting pad at each corner of the semiconductor chip mounting board is reinforced as described above. However, solder bumps formed on other connecting pads, each of which is electrically connecting with a corresponding wiring pattern on a printed circuit board, are not reinforced to a level not to be cracked by a cracking force caused by distortion or bending in the printed circuit board.
The technology shown in Japanese Laid-open Patent Publication No. 61-224444, if applied to the connection between a semiconductor chip mounting board and a PCB, would require the provision of an electrode lead to an electrode pad of a semiconductor chip mounting board and a solder hole in the corresponding electrode pad on a printed circuit board, which would require an additional manufacturing process. This increases the manufacturing cost of the semiconductor chip mounting board and the semiconductor device using that board.
When the semiconductor chip
101
is mounted on the semiconductor chip mounting surface
106
of the semiconductor chip mounting board
102
, the direction and the position of the semiconductor chip mounting board
102
need to be determined for placing the semiconductor chip
101
in a correct direction and position on the semiconductor chip mounting board
102
. Generally, the direction and the position of the semiconductor chip mounting board
102
are determined based upon the result of recognizing the position of a recognition pattern formed on the semiconductor chip mounting surface
106
. The semiconductor chip
102
is then mounted accordingly in a predetermined direction and position on the semiconductor chip mounting surface
106
. The above-described technology is shown in Japanese Laid-open Patent Publications No. 1-302824 and No. 64-73733.
When the semiconductor chip mounting board
102
is mounted on the PCB
103
, the direction and the position of the semiconductor chip mounting board
102
need to be determined again for correctly placing the semiconductor chip mounting board
102
in a predetermined direction and position on the PCB
103
. Further, after the semiconductor chip mounting board
102
is mounted on the PCB
103
, when the mounting condition is inspected, the direction and the position of the semiconductor chip mounting board
102
on the PCB
103
need to be recognized for performing the inspection in a precise manner.
However, a package is generall
Cooper & Dunham LLP
Paladini Albert W.
Ricoh & Company, Ltd.
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