Semiconductor chip having multiple independent memory sections,

Details Semiconductor chip having multiple independent memory sections, Semiconductor chip having multiple independent memory sections,

1996-08-08

1999-03-02

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345508, 345517, 345521, G06F 1576

Patent

active

058777806

ABSTRACT:
Systems and methods are described for combining a plurality of memory sections with a controller, all in a single semiconductor chip. A data processing chip has two or more DRAM memory sections with at least one section being divided into a number of arrays. Data is stored in a particular memory section depending on its associated task. For instance, pixel data is stored in a frame buffer memory section, whereas data relating to pattern, cursor, and video line buffers are stored in an auxiliary memory section. These two separate sections of memory have their own set of address, read/write, activate, control and data lines. Hence, they can be accessed independently by the memory controller. Furthermore, a memory section can be subdivided into a number of distinct arrays. For the subdivided memory section, two separate and distinct address/control buses are implemented to access these arrays. The first address bus is used to specify which selected row within one of these arrays is to be activated. The second address bus is used to specify a selected column of a particular array for performing either a read or write operation. This read or write read operation takes place on a previously activated row within the selected array. These two address buses, enable the memory controller to activate one array while simultaneously reading from or writing to a different array. The systems and methods provide advantages in that bandwidth is increased and a higher throughput is achieved, while fewer I/O pins are needed.

REFERENCES:
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patent: 5473566 (1995-12-01), Rao
patent: 5473573 (1995-12-01), Rao
patent: 5502808 (1996-03-01), Goddard et al.
patent: 5572655 (1996-11-01), Tuljapurkar et al.

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