Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2011-03-22
2011-03-22
Richards, N Drew (Department: 2893)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257SE23010
Reexamination Certificate
active
07911058
ABSTRACT:
The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and a porous silicon domain layer, the semiconductor device layer being provided in a main surface region on one surface of the semiconductor silicon substrate, the porous silicon domain layer being provided in a main surface region on a back surface which is the other surface of the semiconductor silicon substrate, and the porous silicon domain layer having porous silicon domains dispersed like islands in the back surface of the semiconductor silicon substrate.
REFERENCES:
patent: 6248664 (2001-06-01), Saha et al.
patent: 7183172 (2007-02-01), Lee et al.
patent: 2002/0197836 (2002-12-01), Iyer et al.
patent: 2003/0218212 (2003-11-01), Lee et al.
patent: 2004/1012692 (2004-07-01), Ko et al.
patent: 2005/0181572 (2005-08-01), Verhoeven et al.
patent: 2007/0117300 (2007-05-01), Lee et al.
patent: 2008/0280140 (2008-11-01), Ferrari et al.
patent: 60-148128 (1985-08-01), None
patent: 8-213292 (1996-08-01), None
patent: 9-223782 (1997-08-01), None
patent: 10-335632 (1998-12-01), None
patent: 2000-353797 (2000-12-01), None
patent: 3250721 (2001-11-01), None
patent: 2001-358154 (2001-12-01), None
patent: 2002-344012 (2002-11-01), None
patent: 2003-347525 (2003-12-01), None
patent: 2004-214598 (2004-07-01), None
patent: 2004-266070 (2004-09-01), None
patent: 2004-266071 (2004-09-01), None
patent: 2005-005321 (2005-01-01), None
patent: 2005-251939 (2005-09-01), None
patent: 4290038 (2009-04-01), None
patent: 4347960 (2009-07-01), None
patent: 4371710 (2009-09-01), None
patent: 10-2002-0042215 (2002-05-01), None
patent: 10-2003-0090881 (2003-12-01), None
patent: 420827 (2001-02-01), None
patent: 085115259 (2001-02-01), None
patent: 490752 (2002-06-01), None
patent: I230398 (2005-04-01), None
patent: 093115344 (2005-10-01), None
patent: I242232 (2005-10-01), None
patent: WO 02/45146 (2002-06-01), None
Taiwanese Office Action, w/ English translation thereof, issued in Taiwanese Patent Application No. TW 09820393810 dated Jun. 29, 2009.
Taiwanese Office Action, w/ English translation thereof, issued in Taiwanese Patent Application No. TW 095144130 dated Feb. 22, 2010.
Japanese Notice of Reasons for Rejection, with partial English Translation, issued in Japanese Patent Application No. 2005-345056, dated Jun. 9, 2010.
Chinese Office Action, with English translation, issued in Chinese Patent Application No. CN 200610163133.6, mailed Mar. 21, 2008.
Shiyang, Z., et al., “Copper Gettering by Backside Porous Silicon in SIMOX Wafers”, Nov. 1998, pp. 420-424, vol. 18 No. 4, Research & Progress of SSE.
Korean Office Action, with Japanese translation and Partial English Translation, issued in Korean Patent Application No. KR 10-2006-0119959 dated on Jul. 25, 2008.
Aoki Shigeru
Oyu Kiyonori
Elpida Memory Inc.
McDermott Will & Emery LLP
Richards N Drew
Trinh Hoa B
LandOfFree
Semiconductor chip having island dispersion structure and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor chip having island dispersion structure and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip having island dispersion structure and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2663877