Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Patent
1993-06-22
1995-07-04
Mintel, William
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
257620, 257797, 437226, 437227, H01L 2178
Patent
active
054303257
ABSTRACT:
A plurality of semiconductor chips are formed on a wafer. By forming a dummy pattern of a linear shape on an insulating film formed on a semiconductor chip along dicing lines provided for separating the plurality of semiconductor chips into the individual semiconductor chips, when the separation of the semiconductor chips is performed along the dicing lines, an advancing of a film peeling to a recognition mark for bonding within the dummy pattern or elements is prevented to reduce both a recognition error of information at the time of bonding of the semiconductor chip and the number of defective elements.
REFERENCES:
patent: 4364078 (1982-12-01), Smith et al.
patent: 4396934 (1983-08-01), Nishida et al.
patent: 4841354 (1989-06-01), Inaba
Ogata Hiromi
Sawada Hideki
Mintel William
Potter Roy
Rohm & Co., Ltd.
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