Semiconductor chip carrier

Details Semiconductor chip carrier Semiconductor chip carrier

1984-03-30

1987-01-20

Larkins, William D.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

357 80, 361 93, H01L 2302

Patent

active

046383484

DESCRIPTION:

BRIEF SUMMARY
The invention relates to electrical circuit units.
Embodiments of the invention to be described in more detail below are in the form of so-called "chip carriers", that is circuit units incorporating integrated circuits ("chips"). Such embodiments of the invention may be used, for example, in circuit assemblies disclosed in co-pending U.K. Patent Application No. 8203852 (Ser. No. 2095039).
According to the invention, there is provided an electrical circuit unit, comprising electrically insulating material providing two side-by-side major surfaces each surface carrying a plurality of separate electrical contacts arranged adjacent to the edges of the surface, and electrical connections carried by the insulating material and connected to the contacts.
According to the invention, there is also provided a chip carrier, comprising flat electrically insulating material of rectangular external configuration defining upper and lower major surfaces, a plurality of separate electrical contacts arranged side by side along the four sides of each of the two major surfaces, a chip carried by the insulating material and completely enclosed, and electrical connections between the chip and the contacts.
Electrical circuit units embodying the invention will now be described by way of example only and with reference to the accompanying diagramatic drawings in which:
FIG. 1 is a perspective view of one of the circuit elements with a top insulating layer removed;
FIG. 2A is a plan view of a bottom insulating layer of the unit of FIG. 1;
FIG. 2B is a side view of the layer of FIG. 2A;
FIG. 3A is a plan view of an insulating spacer forming part of the unit of FIG. 1;
FIG. 3B is a side view of the spacer of FIG. 3B;
FIG. 4 is a plan view of the insulating top layer for the unit of FIG. 1 and which is omitted from FIG. 1;
FIG. 5 is a perspective view of the unit of FIG. 1 with the top insulating layer in position;
FIG. 6 is a perspective view showing one of the circuit units and, in exploded form, part of a racking assembly;
FIG. 7 is an end view of two of the circuit units connected by a spacer element;
FIG. 8 is a side view of an alternative spacer element;
FIG. 9 corresponds to FIG. 7 but shows the spacer element of FIG. 8 in use;
FIG. 10 is a plan view corresponding to FIG. 5 but showing a modified form of the unit of FIG. 1;
FIG. 11 is a perspective view of another form of the circuit unit;
FIG. 12 is a plan view of a modified form of the circuit unit of FIG. 11;
FIG. 13 shows chips mounted on a tape in a tape-automated-bonding system; and
FIGS. 14 and 15 show stages in transferring chips from the tape shown in FIG. 13 to the chip carrier of FIG. 12.
The unit comprises a base made of suitable insulating material such as glass fibre insulating material or ceramic material for example which may be square. Along each edge three (in this example) conductive pads or contacts 6 are provided. These are made of strip material such as plated on, and, as shown in FIGS. 1, 2A and 2B, each of them extends around an outside edge of the base so as to provide interconnected contact pads on the upper and lower surfaces of the base.
A spacer 8 of insulating material similar to that referred to above is placed on top of the base 5 and matches its outside dimension. As shown particularly in FIG. 1, the spacer has a shoulder 10 running around its inside. Along each of the four edges of the spacer 8 three contacts 12 are provided, each one of which extends on the outside surface of the spacer, over its top surface and terminates at the edge of the shoulder 10.
An electrical circuit device may be placed within the circuit unit as so far described.
In this particular example, the circuit device is an integrated circuit or chip 14 which is secured in a suitable manner to the upper surface of the base 5. Electrical connections such as shown at 16 and 18 are made from various points on the chip 14 to particular ones of the contacts 6 and 12. Such connections may be made by wire-bonding or other well-established connection techniques. The connections 16

REFERENCES:
patent: 3404215 (1968-10-01), Burks
patent: 3614541 (1971-10-01), Farrano
patent: 4320438 (1982-03-01), Ibrahim

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