Fishing – trapping – and vermin destroying
Patent
1993-02-17
1993-11-02
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437211, 437215, 437217, H01L 2160
Patent
active
052583309
ABSTRACT:
A semiconductor chip having contacts on the periphery of its top surface is provided with an interposer overlying the central portion of the top surface. Peripheral contact leads extend inwardly from the peripheral contacts to central terminals on the interposer. The terminals on the interposer may be connected to a substrate using techniques commonly employed in surface mounting of electrical devices, such as solder bonding. The leads, and preferably the interposer, are flexible so that the terminals are movable with respect to the contacts on the chip, to compensate for differential thermal expansion of the chip and substrate. The terminals on the interposer may be disposed in an area array having terminals disposed at substantially equal spacings throughout the area of the interposer, thus providing substantial distances between the terminals while accommodating all of the terminals in an area approximately the same size as the area of the chip itself. The interposer may be provided with a compliant layer disposed between the terminals and the chip to permit slight vertical movement of the terminals towards the chip during testing operations. The chip and interposer assembly may be electrically tested prior to assembly to the substrate. A compliant layer disposed between the terminals and the chip permits slight vertical movement of the terminals towards the chip during testing operations, in which the terminals on the interposer are engaged with an assembly of test probes. The entire assembly is compact.
REFERENCES:
patent: 3302067 (1967-01-01), Jackson et al.
patent: 3390308 (1966-03-01), Marley
patent: 3426252 (1969-02-01), Lepselter
patent: 3474297 (1969-10-01), Bylander
patent: 3487541 (1970-01-01), Boswell
patent: 3614832 (1971-10-01), Chance et al.
patent: 3680037 (1972-07-01), Nellis
patent: 3680206 (1972-08-01), Roberts
patent: 3683105 (1972-08-01), Shamash et al.
patent: 3772575 (1973-11-01), Hegarty et al.
patent: 3795037 (1974-03-01), Luttmer
patent: 3832769 (1974-09-01), Olyphant, Jr. et al.
patent: 3862790 (1975-01-01), Davies et al.
patent: 3864728 (1975-02-01), Peltz et al.
patent: 3868724 (1975-02-01), Perrino
patent: 4179802 (1979-12-01), Joshi
patent: 4237607 (1980-12-01), Ohno
patent: 4356374 (1982-10-01), Noyori et al.
patent: 4410905 (1983-10-01), Grabbe
patent: 4545610 (1985-10-01), Lakritz et al.
patent: 4574470 (1986-03-01), Burt
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4627151 (1986-12-01), Mullholland et al.
patent: 4628406 (1986-12-01), Smith et al.
patent: 4670770 (1987-06-01), Tai
patent: 4681654 (1987-07-01), Clementi et al.
patent: 4685998 (1987-08-01), Quinn et al.
patent: 4709468 (1987-12-01), Wilson
patent: 4710798 (1987-12-01), Marcantonio
patent: 4721993 (1988-01-01), Walter
patent: 4751199 (1988-06-01), Phy
patent: 4751482 (1988-06-01), Fukuta et al.
patent: 4751482 (1988-06-01), Kukula et al.
patent: 4764804 (1988-08-01), Sahara et al.
patent: 4793814 (1988-12-01), Zifcak et al.
patent: 4796078 (1989-02-01), Phelps, Jr. et al.
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 4814295 (1989-03-01), Mehta
patent: 4818728 (1989-04-01), Rai et al.
patent: 4855867 (1989-08-01), Gazdik
patent: 4874721 (1989-10-01), Kimura et al.
patent: 4878098 (1989-10-01), Saito et al.
patent: 4884122 (1989-11-01), Eichelberger et al.
patent: 4893172 (1990-01-01), Matsumoto et al.
patent: 4926241 (1990-05-01), Carey
patent: 4937203 (1990-06-01), Eichelberger et al.
patent: 4941033 (1990-07-01), Kishida
patent: 4942140 (1990-07-01), Ootsuki et al.
patent: 4967261 (1990-10-01), Niki et al.
patent: 4989069 (1991-01-01), Hawkins
patent: 5086337 (1992-02-01), Noro et al.
Microelectronics Packaging Handbook, Rao R. Tummala and Eugen J. Rymaszewski 1989, pp. 420-423 and 1132.
DiStefano Thomas H.
Khandros Igor Y.
Hearn Brian E.
Picardat Kevin M.
Tessera Inc.
LandOfFree
Semiconductor chip assemblies with fan-in leads does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor chip assemblies with fan-in leads, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip assemblies with fan-in leads will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1757266