Semiconductor charge transfer device with multi-level polysilico

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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357 59, 307221D, H01L 2978, H01L 2904, G11C 1928

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active

042622972

ABSTRACT:
A semiconductor charge transfer device, e.g. a CCD area imaging array, having a multi-level polysilicon gate structure (20-22, 24, 25, 26) the geometry of the bus-line portions (24, 25, 26) of which are such that each bus-line has relatively large area regions where it does not overlap another polysilicon layer. The making of interconnections (24b, 25b, 26b) between the polysilicon bus-lines and an overlying metal conductor pattern (24a, 25a, 26a) without producing inter-level short circuits via pinholes in the polysilicon is thus facilitated.

REFERENCES:
patent: 3943543 (1976-03-01), Caywood
patent: 3961352 (1976-06-01), Colton et al.
patent: 4163239 (1979-07-01), Carter

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