Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Reexamination Certificate
2005-11-08
2005-11-08
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
C709S238000
Reexamination Certificate
active
06963079
ABSTRACT:
A parallel processor including two processor element groups each configured to simultaneously execute arithmetic operations for states of all logical values expressable by N bits (N is a natural number) and retain results of the arithmetic operation to execute an arithmetic operation equivalent to N qubits; and an exchange unit for data exchange between the two processor element groups. The two processor element groups are each configured to execute an arithmetic operation equivalent to N qubits are connected to each other via the exchange unit to constitute a processor element group configured to execute an arithmetic operation equivalent to (N+1) qubits with 1 qubit extension, and consequently, it becomes possible to execute a large-scale arithmetic operation at high speed without any increase in the time and effort required for designing an integrated circuit for executing the large-scale arithmetic operation.
REFERENCES:
patent: 2000-68495 (2000-03-01), None
patent: 2001-21932 (2001-01-01), None
J. R. Pasky, et al.; “Regular arrays of quantum-dot cellular automata “macrocells””;Journal of Applied Physics; vol. 87; No. 12; Jun. 15, 2000; pp. 8604-8609.
F.A. Williams; “An expandable single-IC digital filter/Correlator”;Acoustics, Speech, and Signal Process IEEE International Conference on ICASSP'82; vol. 7; May 1982; pp. 1077-1080 with cover page.
Fujishima Minoru
Hoh Koichiro
O'Uchi Shin-ichi
Crane Sara
Japan Science and Technology Agency
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