Semiconductor buffer circuit with a transition delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327264, 327278, 327285, 327261, 327272, H03K 513

Patent

active

061540781

ABSTRACT:
The present invention is directed to a transition delay circuit. The transition delay circuit includes a delay circuit which is responsive to an input signal. The transition delay circuit produces an output signal at a common node. The transition delay circuit also includes a first MOS capacitor connected between the input signal and the common node and a second MOS capacitor connected between the input signal and the common node. A method for delaying an input signal to a buffer circuit is also disclosed.

REFERENCES:
patent: 5343086 (1994-08-01), Fung et al.
patent: 5459424 (1995-10-01), Hattori
patent: 5517131 (1996-05-01), Tien et al.
patent: 5920221 (1999-07-01), Shen et al.
Morgan et al. ("Get a Controlled Delay and Ramp with a Single CMOS Inverter Package'", electronic Design, Mar. 1978.

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