Patent
1987-05-20
1990-03-06
James, Andrew J.
357 34, 357 35, 357 50, 357 55, 357 59, H01L 2934, H01L 2904, H01L 2972
Patent
active
049070630
ABSTRACT:
A semiconductor integrated circuit device is provided with polycrystalline silicon filling U-grooves etched in a semiconductor substrate to form isolation regions which prevent any short-circuiting between the polycrystalline silicon and electrodes or wiring formed on the semiconductor substrate. A silicon dioxide film is formed within the U-grooves, and a silicon nitride film and a silicon dioxide film are further formed thereon. The silicon nitride film has a high hardness which suppresses the development of crystal defects in the peripheral active regions due to the expansion of the surface of the polycrystalline silicon when it is oxidized. When the surface of the polycrystalline silicon is oxidized, the oxidation proceeds along the oxide film over the nitride film, so that the whole of the oxide film is formed thickly. Therefore, the silicon nitride film and the silicon dioxide film are provided with an increased margin against the etching used for forming contact holes.
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patent: T104102 (1984-04-01), Ho et al.
patent: 4509249 (1985-04-01), Goto et al.
patent: 4635090 (1987-01-01), Tamaki et al.
patent: 4661832 (1987-04-01), Lechaton et al.
patent: 4663832 (1987-05-01), Jambotkar
Nakashima Shinji
Ogiue Katsumi
Ohno Nobuhiko
Okada Daisuke
Takakura Toshihiko
Hitachi , Ltd.
Hitachi Microcomputer & Engineering, Ltd.
James Andrew J.
Ngo Ngan Van
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