Semiconductor assembly with one metal layer after base metal...

Details Semiconductor assembly with one metal layer after base metal... Semiconductor assembly with one metal layer after base metal...

2011-07-26

2011-07-26

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Insulative housing or support

C438S106000, C438S458000, C438S611000, C257SE23116, C257SE23151

Reexamination Certificate

active

07985631

ABSTRACT:
A method for packaging an integrated circuit. A barrier metal pattern is disposed on a baseplate. A conductive layer is disposed on the barrier metal pattern. A photoresist having a pattern is applied to the conductive layer. A via is then disposed on the conductive layer. An integrated circuit is coupled to the via and encapsulated. Then, at least a part of the baseplate is removed. An integrated circuit package is produced by the method.

REFERENCES:
patent: 5976912 (1999-11-01), Fukutomi et al.
patent: 6413849 (2002-07-01), Yeoh et al.
patent: 7704800 (2010-04-01), Zhang
patent: 2003/0134450 (2003-07-01), Lee
patent: 2006/0115931 (2006-06-01), Hsu
patent: 2006/0267210 (2006-11-01), Yamano et al.
patent: 2008/0048311 (2008-02-01), Ikenaga et al.

Affiliated with

Also associated with

Rating

Semiconductor assembly with one metal layer after base metal... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor assembly with one metal layer after base metal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor assembly with one metal layer after base metal... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2671534