Semiconductor arithmetic apparatus

Details Semiconductor arithmetic apparatus Semiconductor arithmetic apparatus

1998-01-28

2000-09-05

Ngo, Chuong Dinh

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708207, 348422, G06F 700, H04N 712

Patent

active

061157252

ABSTRACT:
The real time compression of moving images employing vector quantization is realized using simple hardware and with an optimal compression ratio with respect to the communication line capacity employed. In the operating system, which is provided with a first mechanism (202), comprising a plurality of groups of numerical values, a second mechanism (201), a first circuit (206), a second circuit (206), and a third circuit (210), the second circuit comprises a plurality of fourth circuits divided into two or more groups (210-213, 219, and 301), the fourth circuits have a plurality of input terminals and at least one output terminal, and a mechanism is provided having a structure wherein various signals expressing degrees of similarity are inputted into the plurality of input terminals, only that signal having the largest degree of similarity among the variety of signals expressing degrees of similarity which are inputted is outputted from the output terminal, and the output signal of a predetermined first group among the two or more groups is inputted into an input terminal of a second group, whereby only one first vector having the largest degree of similarity is selected.

REFERENCES:
patent: 5031037 (1991-07-01), Israelsen
patent: 5187675 (1993-02-01), Dent et al.

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