Semiconductor apparatus, manufacturing method for the...

Details Semiconductor apparatus, manufacturing method for the... Semiconductor apparatus, manufacturing method for the...

2009-01-27

2011-11-01

Wilson, Allan R (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C250S492200, C257SE31127, C438S065000

Reexamination Certificate

active

08049344

ABSTRACT:
A semiconductor apparatus according to the present invention includes one or a plurality of pairs of a standard pattern and an offset pattern formed therein with respect to the standard pattern as manufacturing information and other information at an information writing position, which is visible from the outside, of each semiconductor chip on a wafer.

REFERENCES:
patent: 4134066 (1979-01-01), Vogel et al.
patent: 5129974 (1992-07-01), Aurenius
patent: 7507598 (2009-03-01), Weng et al.
patent: 7749690 (2010-07-01), Woolaway et al.
patent: 2001/0048145 (2001-12-01), Takeuchi et al.
patent: 2002/0036235 (2002-03-01), Kudo
patent: 2005/0206017 (2005-09-01), Starkston et al.
patent: 2005/0212069 (2005-09-01), Sato et al.
patent: 2008/0083996 (2008-04-01), Kudo
patent: 58116732 (1983-07-01), None
patent: 2004-265983 (2004-09-01), None
patent: 2036-269598 (2006-10-01), None
patent: 2006-303317 (2006-11-01), None
Office Action dated Jun. 30, 2010 for Japanese Patent Application No. 2008-046854 with a brief summary translation.

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