Semiconductor apparatus including semiconductor integrated circu

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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324 731, 371 223, 371 251, G01R 3128

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active

051091909

ABSTRACT:
A semiconductor apparatus including a semiconductor integrated circuit is disclosed. The semiconductor integrated circuit includes a circuit block, a plurality of boundary scan registers, a system data terminal, a test signal terminal and a control circuit. The control circuit responds to a test signal to generate control signals (a select signal LT, shift clock signals SCLK1 and SCLK2, a capture clock signal CPCLK and an update clock signal UPCLK) for controlling the boundary scan registers. The boundary scan registers are connected in cascade to each other and each connected to the circuit block. Each boundary scan register includes a selector circuit (12) and latch circuits (13, 14, 15). The latch circuit (13) responds to the shift clock signal SCLK1 to shift data of an adjacent preceding boundary scan register, an also responds to the update clock signal UPCLK to capture data from the selector circuit (12). The selector circuit (12) responds to the select signal LT to select system data or test data. The latch circuit (14) responds to the shift clock signal SCLK2 to shift the captured data to an adjacent succeeding boundary scan register. The latch circuit (15) responds only to the update clock signal UPCLK to apply the selected data to the circuit block.

REFERENCES:
patent: 4945536 (1990-07-01), Hancu
patent: 4963824 (1990-10-01), Hsieh et al.
patent: 4967142 (1990-10-01), Sauerwald et al.
patent: 5001713 (1991-03-01), Whetsel
"IEEE Standard Test Access Port and Boundary-Scan Architecture", IEEE Std. 1149.1-1990, May 21, 1990.
"Standard Test Access Port and Boundary-Scan Architecture", Sponsor: Test Technology Technical Committee of the IEEE Computer Society, Jun. 20, 1989.

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