Semiconductor apparatus having crystal defects

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With means to reduce minority carrier lifetime

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Details

257156, 257617, H01L 2974, H01L 27082, H01L 2930

Patent

active

058083529

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to semiconductor apparatus such as diodes, transistors, thyristors and MOSFETs and a process for fabricating them. More particularly, the invention relates to semiconductor apparatus that have not only fast switching characteristics but also high breakdown voltage or small leakage current characteristics. The invention also relates to a process for fabricating such semiconductor apparatus.


BACKGROUND ART

It has been known that semiconductor apparatus having a pn junction can be provided with fast switching or response characteristics by shortening the lifetime of carriers either through diffusion of heavy metals such as gold and platinum or through irradiation with particle rays such as electron beams, X-rays and proton rays.
The method of diffusing gold, platinum and other heavy metals into the semiconductor layer has long been studied but the difficulties involved in controlling the amount of diffusion and achieving uniform diffusion have presented the problem of a comparatively poor correlationship between current amplification factor and storage time (h.sub.FE -t.sub.stg) in devices such as transistors. In addition, the need for taking care to prevent the contamination of apparatus such as a post-treatment furnace is a great burden in process control.
The second approach which relies upon irradiation with particle rays aims at shortening the lifetime of carriers by means of the high energy of particle rays which create defects in the crystals of the semiconductor layer so as to form deep energy levels. The restraint on this approach is that it must be implemented in the later stage of the fabrication sequence for the semiconductor apparatus since the created crystal defects will revert to the initial state in terms of the lifetime of carriers and become no longer effective. What is more, the overall exposure of the semiconductor apparatus to particle rays causes additional disadvantages such as reduced dielectric breakdown strength and an excessive exposure to particle rays will deteriorate the electrical characteristics of the semiconductor apparatus.
A method of preventing the drop of dielectric breakdown strength due to exposure to particle rays such as electron beams is disclosed in Unexamined Published Japanese Patent Application (kokai) No. 17678/1983 and characterized in that the crystal defects in the surface of a semiconductor layer which is most prone to experience a drop in dielectric breakdown strength are repaired by annealing which is typically implemented by exposure to electron beams.
U.S. Pat. No. 4,585,489 also discloses a method of ensuring against the drop in dielectric breakdown strength due to irradiation with particle rays such as electron beams. If the semiconductor substrate is exposed to particle rays, the SiO.sub.2 layer on the substrate surface is damaged and positive charges are generated in it, thereby reducing the dielectric breakdown strength. To solve this problem, U.S. Pat. No. 4,585,489, supra, proposes that the SiO.sub.2 layer be removed before providing a semi-insulating layer that is resistant to radiation damage and which is typically formed of oxygen and/or nitrogen containing polycrystalline or amorphous silicon, thereby assuring that no fixed charges will remain in the semi-insulating film. Thereafter, the semiconductor substrate is irradiated with an electron beam to control the lifetime of carriers without reducing the dielectric breakdown strength.
U.S. Pat. No. 4,165,517 teaches a thyristor having a gate region of selective high transport factor .alpha..sub.G. This is achieved either by uniform irradiation of a semiconductor substrate with particle rays such as electron beams in order to shorten the lifetime of carriers and then annealing only the gate region to repair the crystal defects it contains, or by providing a shield such as a lead foil on the surface of the gate region and then irradiating the substrate uniformly with particle rays such as electron beams while protecting the gate region against the

REFERENCES:
patent: 4165517 (1979-08-01), Temple et al.
patent: 4585489 (1986-04-01), Hiraki et al.

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