Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
2008-05-06
2008-05-06
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C257S678000
Reexamination Certificate
active
07368799
ABSTRACT:
The semiconductor apparatus is disclosed that includes a partial SOI substrate including an oxide film; a lateral first MOSFET section having a planar gate structure and formed in the portion of the partial SOI substrate where there is an oxide film; a vertical second MOSFET section having a trench gate structure and formed in the portion of the partial SOI substrate where there is no oxide film, the second MOSFET section being adjacent to the first MOSFET section. The first MOSFET section includes a first p-type base region on the oxide film. The second MOSFET section includes a second n+-type drain region, a second n-type drift region on the second n+-type drain region, and a second p-type base region in the surface portion of the second n-type drift region. The height H1of the pn-junction between the second n-type drift region and the second p-type base region from the second n+-type drain region is set to be lower than the height H2of the boundary between the oxide film and the first p-type base region from the second n+-type drain region to make the oxide film serve as a field plate. The semiconductor apparatus including a vertical device and a lateral device configured as described above facilitates doping the second n-type drift region heavily while securing a certain breakdown voltage, reducing the ON-resistance of the second MOSFET section, and reducing the semiconductor chip size.
REFERENCES:
patent: 11-204541 (1999-07-01), None
Baliga, B. Jayant, “Power Semiconductor Devices,” PWS Publishing Company, pp. 519-523.
Nakagawa, Akio, “Impact of Dielectric Isolation Technology on Power ICs,” IEEE, 1991, pp. 16-19.
Fuji Electric Holdings Co., Ltd.
Pham Long
Rossi Kimms & McDowell LLP
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