Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2001-04-18
2002-10-01
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S690000, C257S723000, C257S724000, C257S725000
Reexamination Certificate
active
06459146
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor apparatus used mainly as a switching device in, for example, a motor drive device in an inverter, an AC servomotor, an air conditioner, etc., or a power supply device in a vehicle, a welding machine, etc., and more specifically to the improvement of an electrode wiring structure in a semiconductor apparatus applicable as a power semiconductor module.
2. Description of the Related Art
Normally, a semiconductor module can be, for example, a plurality of semiconductor devices (semiconductor chips) connected in parallel to have a larger current capacity, a simple circuit of several types of semiconductor devices, semiconductor devices into which a drive circuit is incorporated, etc.
FIG. 1
is a plan view of an example of a conventional power semiconductor module.
In the semiconductor module shown in
FIG. 1
, an insulated substrate
2
is mounted on a base plate
1
for fixing. On the insulated substrate
2
, a plurality of (four as an example shown in
FIG. 1
) semiconductor devices (semiconductor chips)
4
are mounted in series through a conductive plate
3
. In this example, the semiconductor device
4
is a MOSFET (metal oxide semiconductor field-effect transistor) having a source electrode and a gate electrode on the top side, and a drain electrode on the reverse side.
The conductive plate
3
is electrically connected commonly to the drain electrode of each semiconductor device
4
by mounting the semiconductor device
4
directly on it, thereby functioning as a drain electrode of the entire module. On the insulated substrate
2
, a source electrode
5
and a gate electrode
6
of the entire module are respectively mounted along the array of the semiconductor devices
4
and on either side of the conductive plate (drain electrode)
3
on which the semiconductor devices
4
are mounted.
The source electrode
5
is electrically connected commonly to the source electrode of each semiconductor device
4
through a wire (bonding wire)
7
, and the gate electrode
6
is electrically connected commonly to the gate electrode of each semiconductor device
4
through a wire (bonding wire)
8
. A gate resistor such as a silicon chip resistor, etc. can be provided on the gate electrode
6
, and the wire
8
can be connected thereto.
Furthermore, a drain terminal
9
is led outside the module as an external terminal from a portion of the conductive plate (drain electrode)
3
, a source terminal
10
is led outside the module as an external terminal from a portion of the source electrode
5
, and a gate terminal
11
is led outside the module as an external terminal from a portion of the gate electrode
6
.
Although not shown in the attached drawings, the entire module is normally put in a resin package, and the space in the package is filled with gel or epoxy resin, etc. The above mentioned external terminal is drawn in a two-dimensional array in
FIG. 1
, but it is appropriately bent and exposed on the top or side of the package.
The semiconductor module with the above mentioned configuration has a plurality of semiconductor devices
4
connected in parallel between the drain terminal
9
and the source terminal
10
. Therefore, in principle, the main current flowing between the drain terminal
9
and the source terminal
10
can be controlled by applying a control voltage between the gate terminal
11
and the source terminal
10
, and simultaneously setting all semiconductor devices
4
ON/OFF.
In the conventional semiconductor module as shown in
FIG. 1
, restrictions are placed by the gate electrode
6
especially on the wiring pattern from the drain electrode (conductive plate)
3
to the drain terminal
9
. That is, the drain terminal
9
is led outside through the path from the end portion of the conductive plate
3
without passing the gate electrode
6
.
Therefore, the lengths of the current paths are entirely long when the main current flows from the drain terminal
9
to the source terminal
10
through each semiconductor device
4
, and the lengths are uneven depending on the position of each semiconductor device
4
. Especially, the current path through the semiconductor device
4
shown in
FIG. 1
on the right is considerably longer than the current path through the semiconductor device
4
on the left.
Since the inductance generated in the current path is substantially proportional to the length of the path, the inductance increases correspondingly when the current path is long as described above. As a result, the surge voltage generated when the semiconductor device
4
is turned off rises, thereby possibly destroying the semiconductor device
4
.
In addition, when the lengths of current paths are not even, the wiring resistance also becomes uneven depending on the position of each semiconductor device
4
. As a result, the current value becomes unbalanced, thereby leading excess current through only a part of the semiconductor devices
4
, and also possibly destroying the semiconductor devices
4
. Therefore, with the problem of the above mentioned excess current to a part of the semiconductor devices
4
has prevented the maximum current through the module from largely increasing.
Furthermore, with the drain terminal
9
directly connected to the conductive plate
3
to be mounted on the insulated substrate
2
as the semiconductor module as shown in
FIG. 1
, there can easily be a crack in the joint (the portion encompassed by a circle A indicated by a dot-and-dash line) between the drain terminal
9
and the conductive plate
3
due to the expansion and contraction by the heat from the semiconductor devices
4
.
Therefore, to solve the above mentioned problems, the Applicant of the present invention has suggested a semiconductor module having the structure as shown in FIG.
2
.
In the semiconductor module shown in
FIG. 2
, there is the conductive plate
3
mounted on the insulated substrate
2
having a drain electrode
12
on one side, and the source electrode
5
on the other side. On the drain electrode
12
, the gate electrode
6
is mounted through an insulating plate (insulating layer)
13
.
Furthermore, the drain electrode
12
is connected to the conductive plate
3
through a plurality of wires
14
equally arranged at predetermined distances from one another along the array of the semiconductor devices
4
. Thus, the drain electrode
12
is commonly connected to each of the semiconductor devices
4
through the wires
14
and the insulating plate
13
.
In addition, two drain terminals
9
are led from the drain electrode
12
, and two source terminals
10
are led from the source electrode
5
. These drain terminals
9
and source terminals
10
are provided on either side of the conductive plate
3
.
With the above mentioned configuration, the drain electrode
12
and the conductive plate
3
are connected through the wires
14
arranged at predetermined distances along the array of the semiconductor devices
4
. Therefore, the drain electrode
12
and the insulating plate
13
are equivalent to the structure in which they are directly connected on their sides (the plane along the above mentioned array direction). Therefore, the main current flows substantially straight from the drain electrode
12
to each of the semiconductor devices
4
through the conductive plate
3
, and then straight to the source electrode
5
. Since the drain terminal
9
and the source terminal
10
are opposite each other, the main current flows substantially straight from the drain terminal
9
to the source terminal
10
through the shortest path.
Thus, since the current path of the main current flows substantially straight from the drain terminal
9
to the source terminal
10
, the length of the current path can be the shortest possible. As a result, the inductance can be reduced, and the surge voltage can be suppressed, thereby enhancing the reliability of the entire module.
Furthermore, since the length of the current path can be leveled in the module regardless of t
Huynh Andy
Nelms David
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