Active solid-state devices (e.g. – transistors – solid-state diode – Bulk effect device – Bulk effect switching in amorphous material
Reexamination Certificate
2005-11-15
2009-12-29
Pham, Thanh V (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Bulk effect device
Bulk effect switching in amorphous material
C438S102000, C438S103000, C257SE29002, C365S163000
Reexamination Certificate
active
07638786
ABSTRACT:
The annealing process at 400° C. or more required for the wiring process for a phase change memory has posed the problem in that the crystal grains in a chalcogenide material grow in an oblique direction to cause voids in a storage layer. The voids, in turn, cause peeling due to a decrease in adhesion, variations in resistance due to improper contact with a plug, and other undesirable events. After the chalcogenide material has been formed in an amorphous phase, post-annealing is conducted to form a (111)-oriented and columnarly structured face-centered cubic. This is further followed by high-temperature annealing to form a columnar, hexagonal closest-packed crystal. Use of this procedure makes it possible to suppress the growth of inclined crystal grains that causes voids, since crystal grains are formed in a direction perpendicular to the surface of an associated substrate.
REFERENCES:
patent: 5714768 (1998-02-01), Ovshinsky et al.
patent: 5825046 (1998-10-01), Czubatyj et al.
patent: 2003/0067013 (2003-04-01), Ichihara et al.
patent: 11-514150 (1999-11-01), None
patent: 2001-502848 (2001-02-01), None
“Crystallographic Data on Minerals” in CRC Handbook of Chemistry and Physics, Internet Version 2007, (87th edition), David R. Lide, ed., Taylor and Francis, Boca Raton FL.
“oblique” Merriam-Webster Online Dictionary. 2007, http://www.merriam-webster.com (Sep. 13, 2007).
Technical Digest of International Electron Devices Meeting pp. 803-806.
Journal of Applied Physics, vol. 87, Issue No. 9, p. 4130, May 2000.
S, Hosaka, K. Miyauchi, T. Tamura, Y. Yin, and H. Sone: Proposal of memory transistor using a phase change and nano-size effects for high density memory array, Proc. Of PCOS2003, Shizuoka, Japan, pp. 52-55, 2003.
F. Pellizzer et al. 2004 Symposium on VLSI Technology Digest of Technical Papers, IEEE, 2004, pp. 18-19.
Matsui Yuichi
Morikawa Takahiro
Takaura Norikatsu
Terao Motoyasu
Yamamoto Naoki
Antonelli, Terry Stout & Kraus, LLP.
Pham Thanh V
Renesas Technology Corp.
Valentine Jami M
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