Semiconductor amplification means combining two cascaded transis

Details Semiconductor amplification means combining two cascaded transis Semiconductor amplification means combining two cascaded transis

1976-03-08

1977-06-21

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307303, 307315, 357 36, 357 46, 330 28, H03K 326

Patent

active

040314162

ABSTRACT:
The present invention relates to semiconductor amplification means, which may be fabricated as a monolithic semiconductor structure, for use in an automatic gray scale control circuit for a color television receiver. During the blanking interval, the control circuit senses the cut-off voltage of each gun of a three gun color cathode ray tube and stores that voltage. During the video field, the stored voltage is used to energize the driver for the individual gun and to bias that gun. The AGS control function for each gun requires two amplifiers of high current gain, high inverse impedance, only one of which is on at a time, and a consolidation of the sensing and output functions in two terminals. These functions are achieved in a four transistor configuration in which two cascaded pairs of emitter follower transistor amplifiers are connected in a closed loop. A high inverse impedance is achieved by the provision of a second emitter in the output transistor of each cascaded pair, coupled to the base of the preceding transistor to insure turn off.

REFERENCES:
patent: 2864904 (1958-12-01), Jensen
patent: 3233125 (1966-02-01), Buie
patent: 3913213 (1975-10-01), Mills et al.
patent: 3971961 (1976-07-01), Inami et al.

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