Stock material or miscellaneous articles – Composite – Of metal
Reexamination Certificate
2002-05-10
2004-02-17
Stein, Stephen (Department: 2811)
Stock material or miscellaneous articles
Composite
Of metal
C428S697000, C428S704000, C117S002000, C117S953000, C117S954000, C438S480000, C438S510000
Reexamination Certificate
active
06692837
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semi-insulating InP substrate, a fabrication method of semiconductor thin film, and a semiconductor optical device fabricated by using the method.
2. Description of the Related Art
A semiconductor device fabricated on a semi-insulating substrate such as a semiconductor laser, a semiconductor optical modulator, a monolithically integrated laser and modulator can perform high speed modulation since device capacitance of such a semiconductor device is smaller than that of a semiconductor device fabricated on an n-type substrate or a p-type substrate. Therefore, the semiconductor optical device fabricated on the semi-insulating semiconductor substrate is indispensable for realizing a high capacity optical transmission system.
Generally, these semiconductor devices have a structure in which an about 2 &mgr;m-width mesa stripe is buried with a semi-insulating semiconductor or stacked layers including a pn-junction. The mesa stripe is formed by stacking an n-type semiconductor crystal layer, a nondoped semiconductor crystal layer and a p-type semiconductor crystal layer in this order (refer to Japanese laid open patent application No. 11-24020, for example).
However, when adopting this layer structure, device resistance can not be decreased, because a p-electrode with larger contact resistance than that of an n-electrode must be used as a top electrode. Since an area of a top electrode with a narrow stripe pattern is smaller than that of a bottom electrode, a resistance of the device with a p-type top electrode is larger than that of the device with a p-type bottom electrode. Therefore, good device performance can not be obtained.
The reason for forming the n-type semiconductor layer adjacent to the semi-insulating substrate is to avoid inter-diffusion between Zn and Fe which is widely used as a semi-insulating impurity for InP. More specifically, the reason is that, if a Zn-doped semiconductor crystal layer is grown on a Fe-doped semi-insulating substrate, inter-diffusion between Fe and Zn occurs so that concentration of p-type dopant decreases and the semi-insulating property of the substrate degrades. The p-type impurity that causes inter-diffusion between the p-type impurity and Fe is not limited to only Zn. Other p-type impurities such as Be, Cd, and Mg cause similar inter-diffusion.
To solve this problem, Japanese laid open patent application No. 2000-332287 discloses a technology in which a buffer layer is inserted between the semi-insulating substrate and the Zn-doped semiconductor layer for preventing the inter-diffusion. As examples of the buffer layer, a low concentration p-type layer and a low concentration semi-insulating doping layer are disclosed. That is, inter-diffusion is prevented by lowering the concentration of the p-type impurity or the semi-insulating impurity.
However, this structure includes the following problems. As shown in
FIGS. 2 and 4
, and the corresponding descriptions in the Japanese laid open patent application No. 2000-332287, when a low concentration p-type layer is used for preventing inter-diffusion, the p-type dopant concentration must be adjusted to about 1×10
15
cm
−3
. When a low concentration semi-insulating doping layer is used, the dopant concentration must be adjusted to about 5×10
15
cm
−3
.
If the dopant concentration increases to about 1×10
16
cm
−3
, the amount of diffusion of the dopant increases to the extent that device performance degrades. However, since it is difficult to control doping concentration accurately at a low concentration region, it is difficult to fabricate high performance devices by high yield with good reproducibility. More specifically, when inserting the low concentration p-type layer as the buffer layer, depletion in the low concentration p-type layer occurs, and the conductivity of a part of the semi-insulating substrate becomes a p-type due to diffusion of the p-type dopant. As a result, parasitic capacitance increases, and, since a low-resistive layer is formed in the substrate, leakage currents increase, and, there is a problem in that complete electrical isolation of the devices are not obtained. In addition, when diffused p-type dopant reaches the active region of the device, performance of the device directly degrades. In the same way, when the low concentration semi-insulating doping layer is inserted as the buffer layer, the conductivity of a part of the semi-insulating substrate becomes p-type, and performance of the device degrades due to diffusion of the p-type dopant. As a result, there occurs a problem in that parasitic capacitance increases, and complete electrical isolation of the devices are not obtained.
As for the low concentration semi-insulating doping layer, the Japanese laid open patent application 2000-332287 discloses that a layer to which Ru is doped at a low concentration is used as the buffer layer for preventing inter-diffusion of dopants between the semi-insulating substrate and the p-type semiconductor layer. However, the doping concentration for the semi-insulating layer is equal to or below 1×10
16
cm
−3
according to the Japanese laid open patent application 2000-332287. As is described in A. Dadger et al., Applied Physics Letters 73, No 26 pp 3878-3880 (1998), for example, it is known that the ratio of electronically activated Ru atoms that compensate for electrons to the doped Ru atoms in the semiconductor layer is about 6%. Therefore, when the doping concentration of Ru in the semiconductor layer is 1×10
16
cm
−3
, the concentration of the activated Ru atoms that compensate for electrons is about 6×10
14
cm
−3
. However, since the concentration of electrons in a nondoped InP layer is usually from 1×10
15
cm
−3
to 1×10
16
cm
−3
, it is difficult to obtain the semi-insulating InP layer by using the Ru doping concentration of 1×10
16
cm
−3
. Therefore, the semiconductor layer with low Ru concentration of 1×10
16
cm
−3
or less does not have a complete semi-insulating property, so that the conductivity of the low Ru concentration semiconductor layer may become n-type, which may cause an increase of parasitic capacitance and leakage currents, and degradation of device performance.
Recently, it has been found that a Ru-doped InP layer is semi-insulating, and that, inter-diffusion between Zn and Ru does not occur when a Ru-doped semi-insulating InP crystal layer is grown on a Zn-doped semiconductor crystal layer by using the MOVPE (Metalorganic Vapor Phase Epitaxy) method (A. Dadger et al., Applied Physics Letters 73, No 26 pp 3878-3880 (1998)).
Generally, Fe, as a semi-insulating dopant, is used for fabricating a semi-insulating InP substrate. The semi-insulating InP substrate is obtained by growing an ingot 2 inches in diameter using the LEC (Liquid Encapsulated Czochralski) method, and by slicing the ingot.
However, a Ru-doped semi-insulating substrate has not been obtained. In addition, a semi-insulating substrate on which a Ru-doped semiconductor layer that has a complete semi-insulating property is formed has not be obtained.
The semiconductor layer that has a complete semi-insulating property is defined to be a semiconductor layer in which an electron compensator is doped at a concentration higher than the concentration of electrons in the semiconductor layer so that the semiconductor layer has a semi-insulating property. In this definition, the electron compensator is the active Ru that acts as the electron compensator.
In addition, it has not been reported that a semiconductor optical device is formed on a Ru-doped semiconductor layer that has a complete semi-insulating property.
SUMMARY OF THE INVENTION
An object of the present invention is to solve a problem caused by forming a p-type semiconductor layer on the Fe-doped semi-insulating InP substrate.
In the present invention, a semi-insulating InP substrate with a new structure, a method for forming a
Iga Ryuzo
Kondo Susumu
Kondo Yasuhiro
Ogasawara Matsuyuki
Nippon Telegraph and Telephone Corporation
Stein Stephen
LandOfFree
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