Semi-conductor memory component, and a process for operating...

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S189011, C365S189040

Reexamination Certificate

active

07317656

ABSTRACT:
The invention relates to a semi-conductor memory component and process for operating a semi-conductor memory component, including activating the memory cells of a memory cell array, when one or several memory cell(s) included in the first set of memory cells need(s) to be accessed, accessing the corresponding memory cell or memory cells, deactivating the memory cells contained in a first set of memory cells, when one or several further memory cells that are not included in the first set of memory cells need(s) to be accessed, and prematurely deactivating the memory cells included in the first set of memory cells, when a predetermined time period or number of pulses after one or several memory cells included in the first set of memory cells have last been accessed first no further accessing of one or several of the memory cells included in the first set of memory cells takes place.

REFERENCES:
patent: 5813041 (1998-09-01), McIntyre et al.
patent: 5848025 (1998-12-01), Marietta et al.
patent: 5881017 (1999-03-01), Matsumoto et al.
patent: 5918030 (1999-06-01), Christian et al.
patent: 2002/0141272 (2002-10-01), Benedix et al.
patent: 2003/0084234 (2003-05-01), Hang

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