Semi conductor memory cell utilizing sensing of variations in PN

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

357 42, 357 43, 357 54, 307304, 340173R, H01L 2978, H01L 2702, H01L 2934

Patent

active

040372430

ABSTRACT:
Charge is stored on the gate of a gate controlled diode in a memory element to provide a junction breakdown memory cell. A quantity of charge representative of a logical 1 or a logical 0 may be dynamically stored in one embodiment. In another embodiment a composite silicon nitride/silicon dioxide dielectric is utilized to provide non-volatile storage of a logic state. Selection and sensing circuitry are coupled to an array of junction breakdown memory elements. Sensing circuitry detects the difference in reverse current of the gate controlled diode corresponding to a stored logical 1 and a stored logical 0, respectively.

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patent: 3846766 (1974-11-01), Nojima et al.
patent: 3877058 (1975-04-01), Cricchi
patent: 3881180 (1975-04-01), Gosney

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