Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1985-02-07
1986-09-30
Smith, John D.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
148 15, 156643, 156644, 156653, 156657, 427 88, 427 93, 427 94, 430314, 430316, 430317, H01L 21316
Patent
active
046146660
ABSTRACT:
Improved silicon semi-conductor device and process includes three layer sandwich passivation coating. The sandwich coating comprises first, a thin silica layer, preferably produced by oxidizing a silicon surface to the minimum thickness necessary to prevent interdiffusion of an overlying nitride layer with the silicon subsurface. The second layer of the sandwich construction is nitride and the third layer is a thicker layer of silica, preferably produced by plasma glass deposition which, together with the inner silica layer provides preselected electrical characteristics required of the composite barrier or passivation coating. This invention reduces manufacturing defects produced in conventional two layer passivation coatings, including a thicker silica inner layer, due to undercutting of the thicker silica inner layer upon etching to form terminal areas. Such undercutting is avoided by the thin silica inner layer in the present invention.
REFERENCES:
patent: 4110125 (1978-08-01), Beyer
patent: 4395438 (1983-07-01), Chiang
Bratter et al., "Ion Implanted Emitter Process in Silicon/Silicon Dioxide Passivation Technology" IBM TDB, vol. 18, No. 6, 11/75.
Smith John D.
Sperry Corporation
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