Semi-conductor component with clock relaying device

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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Details

C365S194000

Reexamination Certificate

active

06917562

ABSTRACT:
The invention involves a component with a connection (3b), as well as at least one further connection (3a), whereby differential input clock pulses (CLK, CLKT; /CLK, /CLKT) can be applied to the connections (3a, 3b), or a single input clock pulse (CLK, CLKT) applied to the connection (3b) and/or to the further connection (3a)—, and where the component in addition has a first and a second pulse relay device (50, 51), where the first pulse relay device (50) has been provided for relaying differential input clock pulses (CLK, CLKT; /CLK, /CLKT), and the second pulse relay device (51) for relaying a single input clock pulse (CLK, CLKT).

REFERENCES:
patent: 6292403 (2001-09-01), Pancholy et al.
patent: 6385128 (2002-05-01), Arcoleo et al.
patent: 6407591 (2002-06-01), Wong et al.
patent: 6424555 (2002-07-01), Chang
patent: 2001/0043099 (2001-11-01), Kawasaki et al.

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