Coded data generation or conversion – Converter calibration or testing – Trimming control circuits
Reexamination Certificate
2000-08-03
2001-12-18
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
Trimming control circuits
C341S118000, C341S120000, C341S136000
Reexamination Certificate
active
06331830
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of digital-to-analog converters (DACs), and particularly to circuits and methods for automatically calibrating the current sources making up a switched current source DAC.
2. Description of the Related Art
Demand for high speed/high resolution DACs continues to grow, driven primarily by strong growth in the markets for wired and wireless communications. One architecture which has been used to construct high speed/high resolution DACs employs an array of current sources: the DAC receives a digital input word which represents a desired output current, and the current sources are selectively switched to an output to provide the desired output current. Such “switched current source” DACs have been favored for high speed and high resolution applications due to their ability to drive a resistive load directly, without the need for a voltage buffer.
One problem which afflicts switched current source DACs is current source mismatch. A typical switched current source DAC employs a segmented current source design, with the DAC's most significant bits (MSBs), upper least significant bits (ULSBs), and lower least significant bits (LLSBs) implemented with respective current source subarrays, with the current sources in a given subarray ideally producing identical output currents. Mismatch between the current sources in a given subarray, particularly if within the MSB subarray, degrades the DAC's static linearity, which in turn degrades its dynamic linearity.
Some method of static calibration is typically employed to reduce mismatch between current sources. Traditionally, as discussed, for example, in D. Groeneveld et al., “A Self-Calibration Technique for Monolithic High-Resolution D/A Converters,”, IEEE Journal of Solid-State Circuits, vol. 24, pp. 1517-1522, December 1989, this has been accomplished by using an additional current source within a subarray, which allows one current source to be taken out of the circuit at any one time for calibration measurement and/or correction purposes, leaving a full bank of current sources available for normal DAC operation.
The requirement for an additional current source, however, can impact the DAC's dynamic performance, since the switching in and out of current sources at the calibration rate introduces spurs at the calibration frequencies in the DAC output spectrum. In practice, these spurs include additional dynamic components from dynamic mismatches between the current source arrays being used at any one time. These dynamic mismatches are not attenuated by the calibration mechanism, and can, in fact, be increased by mismatches in the switches needed to facilitate the calibration.
SUMMARY OF THE INVENTION
A self-trimming current source circuit and method are presented for use with switched current source DACs, which improve the static and dynamic linearity of such DACs without requiring the use of any additional current sources.
Each self-trimming current source is made from a fixed current source and a variable current source, which are connected in parallel to provide a total output current. To calibrate, one side of the self-trimming current source is temporarily switched to a measurement circuit, which determines the magnitude of the total output current. Based on this measurement, the output of the variable current source is adjusted to make the total output current equal to a predetermined value (within a predetermined tolerance determined by the accuracy and resolution of the measurement and correction circuits).
The fixed current source is implemented with a complementary pair of field-effect transistors (FETs) connected in a cascode connection, with the two source terminals connected together and the two drain terminals presenting high impedances to the circuitry to which they are connected. The top FET establishes the bottom FET's gate-source voltage, thereby fixing the current through the pair. The self-trimming current source's output current is taken at the top FET's drain terminal and is measured via the bottom FET's drain, with the high impedances provided by the specified cascode configuration enabling reduced output current distortion and a nearly-constant total output current.
The variable current source is connected in parallel with the fixed current source, and provides an output current that varies with a control signal received at an input. The output currents of the fixed and variable current sources are summed to provide a total output current, which is periodically measured via the bottom FET's drain terminal. Based on the measurement value, the control signal provided to the variable current source is varied as necessary to make the total output current equal to the predetermined value.
A typical switched current source DAC contains a number of such self-trimming current sources, with the total output currents of each automatically measured and adjusted once for every one of the DAC's conversion cycles. The invention is applicable to both single-ended and differential output DACs.
REFERENCES:
patent: 4272760 (1981-06-01), Prazak et al.
patent: 4568917 (1986-02-01), McKenzie et al.
patent: 5153592 (1992-10-01), Fairchild et al.
patent: 5666118 (1997-09-01), Gersbach
IEEE Journal Of Solid-State Circuits,A Self-Calibration Technique for Monolithic High-Resolution D/A Converters, D. Wouter J. Groeneveld, Hans J. Schouwenaars, et al. vol. 24, No. 6, p. 1517-1522 (12-89).
Bugeja Alex R.
Song Bang-Sup
Koppel & Jacobs
Mai Lam T.
Rockwell Technologies LLC
Tokar Michael
LandOfFree
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