Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-08-16
2005-08-16
Tran, M. (Department: 2818)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230020
Reexamination Certificate
active
06930953
ABSTRACT:
A circuit takes a reference strobe signal as a first input, and a strobe ready signal generated from a memory that is strobed by the reference strobe signal as a second input. The circuit generates a self-timed strobe signal along with other control signals that are used to perform a subsequent memory access in a single clock cycle, thereby doubling memory access bandwidth.
REFERENCES:
patent: 5802555 (1998-09-01), Shigeeda
patent: 6091663 (2000-07-01), Kim et al.
patent: 6456544 (2002-09-01), Zumkher
patent: 6496445 (2002-12-01), Lee
patent: 6580305 (2003-06-01), Liu et al.
Erdogan Mustafa Ulvi
Heragu Keerthinarayan P.
Landers Robert James
Brady III W. James
Stewart Alan K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tran M.
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