Self timed precharge sense amplifier for a memory array

Details Self timed precharge sense amplifier for a memory array Self timed precharge sense amplifier for a memory array

1997-06-09

1998-11-10

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518525, 327 51, G11C 1606

Patent

active

058354107

ABSTRACT:
A self timed precharge sense amplifier for allowing high speed reading of a memory cell of a memory array. The self timed precharge sense amplifier uses a precharge device for generating an output voltage which is used to ramp up a voltage level of a column of the memory array where the memory cell is located. State control circuitry is coupled to the precharge device for activating and deactivating the precharge device. A sense amplifier is coupled to the precharge device and to the state control circuitry for monitoring the output voltage of the precharge device and for signalling the state control circuitry to deactivate the precharge device when the output voltage has reached a threshold voltage level set by the sense amplifier which is a minimum amount of voltage required to properly read the memory cell.

REFERENCES:
patent: 5477484 (1995-12-01), Nakashima
patent: 5642313 (1997-06-01), Ferris
patent: 5671186 (1997-09-01), Igura
patent: 5675535 (1997-10-01), Jinbo

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