Self-timed phase detector and method

Details Self-timed phase detector and method Self-timed phase detector and method

1996-02-02

1997-12-02

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

327156, H03P 1300

Patent

active

056940629

ABSTRACT:
A self-timed phase detector for detecting the phase of an input signal, such as a high speed serial data stream. The self-timed phase detector includes a precharged latch, a phase detector circuit and a data valid gate. The precharged latch has a latch input, a sample clock input and first and second complementary latch outputs. The first and second complementary latch outputs have an active state and a precharged state. The phase detector circuit is coupled to the first latch output and generates a phase signal on a phase output as a function of the phase of the input signal. The data valid gate is coupled to the phase output for passing the phase signal when the latch outputs are in the active state and for blocking the phase signal when the latch outputs are in the precharged state.

REFERENCES:
patent: 4712224 (1987-12-01), Nelson
patent: 4750193 (1988-06-01), Bailey
patent: 4821296 (1989-04-01), Cordell
patent: 5081655 (1992-01-01), Long
patent: 5115455 (1992-05-01), Samaras et al.
patent: 5162746 (1992-11-01), Ghoshal
patent: 5170130 (1992-12-01), Ichihara
patent: 5200980 (1993-04-01), Briddell
patent: 5208546 (1993-05-01), Nagaraj et al.
patent: 5272395 (1993-12-01), Vincelette
patent: 5278873 (1994-01-01), Lowrey et al.
patent: 5280205 (1994-01-01), Green et al.
patent: 5301196 (1994-04-01), Ewen et al.
patent: 5361229 (1994-11-01), Chiang et al.
patent: 5371766 (1994-12-01), Gersbach et al.
patent: 5373255 (1994-12-01), Bray et al.
patent: 5400370 (1995-03-01), Guo
patent: 5475326 (1995-12-01), Masuda
patent: 5577079 (1996-11-01), Zenno et al.
patent: 5586309 (1996-12-01), Lin
"A 30 MHz High Speed Analog/Digital PLL in 2 .mu.m CMOS," B. Kim et al., IEEE International Solid-State Circuits Convention, Digest of Technical Papers, pp. 104-105 (1990).
"Single Chip 1062 Mbaud CMOS Transceiver for Serial Data Communication," J. Ewen et al., IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 18-19, 32-33, 336, 340 (1995).

Affiliated with

Also associated with

Rating

Self-timed phase detector and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-timed phase detector and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-timed phase detector and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-804908