Self-timed clocking system and method for self-timed dynamic log

Details Self-timed clocking system and method for self-timed dynamic log Self-timed clocking system and method for self-timed dynamic log

1993-09-29

1994-07-12

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307452, 307481, H03K 19017

Patent

active

053291760

ABSTRACT:
A clocking system and method are provided for logic blocks having cascaded self-timed dynamic logic gates. The dynamic logic gates are precharged in parallel and collectively perform self-timed logic evaluation on vector inputs to derive a vector output. An evaluation done detector monitors the output of the logic block and determines when the vector output is valid. An edge detector detects the rising and falling edges of an arbitrary periodic timing signal. Finally, a logic block clock generator is set by the edge detector and reset by the evaluation done detector so as to provide precharging signals to the logic block, thereby defining respective precharge periods, and to provide evaluation periods for the self-timed logic evaluations in the logic block. In a specific implementation, the speed of logic evaluations is twice the speed of the system clock.

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