Self-timed circuit having critical path timing detection

Details Self-timed circuit having critical path timing detection Self-timed circuit having critical path timing detection

1996-08-08

1999-02-09

Chung, Phung M.

Excavating

371 61, 371 62, G06K 504, G11B 500

Patent

active

058704043

ABSTRACT:
A self-timed circuit for use a clocked logic system is disclosed that comprises a timing detection device for detecting a timing margin of a critical path, the critical path being a path that limits the speed of the system. The circuit further comprises increase logic for increasing the speed of the system clock if the timing margin allows it, and decrease logic for decreasing the speed of the system clock if the timing margin indicates such a need. The increase and decrease logic comprise threshold generator and reset logic, and clock control logic.

REFERENCES:
patent: 5208490 (1993-05-01), Yetter
patent: 5329176 (1994-07-01), Miller, Jr. et al.
patent: 5410263 (1995-04-01), Waizman
patent: 5434520 (1995-07-01), Yetter et al.
patent: 5444405 (1995-08-01), Truong et al.
patent: 5451892 (1995-09-01), Bailey
patent: 5455521 (1995-10-01), Dobbelaer
IBM/vol. 38, No. 03, Mar. 1995/Self Adjusting Multi-Frequency Dynamic Focus Circuit for Cathode Ray Tube Displays.
IBM/vol. 36, No. 10, Oct. 1993/Dynamic Clock Phase Shifter for Logic Delay Tracking.
IBM/vol. 29, No. 3, Aug. 1986/Fiber-Optic Inverter Repeater.

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