Self testing data processing system with processor independent t

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364200, 371 20, G06F 1100

Patent

active

046334661

ABSTRACT:
The present invention relates to a self testing data processing system which includes a communications bus for communication between a number of slots, at least one nonintelligent data processing circuit connected to one of those slots and at least one intelligent data processing circuit connected to another of those slots. Each nonintelligent data processing circuit includes a test memory which is readable from the communication bus. The test memory has a diagnostic program stored therein for testing that nonintelligent data processing circuit. This diagnostic program is written in an intermediate level interpretable test language. Each of the intelligent data processing circuits includes an interpreter program for interpreting the intermediate level interpretable test language into the native code of the intelligent data processing circuit. Testing of the data processing system takes place by the intelligent data processing circuit recalling, interpreting and executing the diagnostic program stored in the test memory of each nonintelligent data processing circuit. In a further embodiment, the data processing system includes a mass memory means, such as a disk system, which includes additional system diagnostic programs written in the intermediate level interpretable test language. Additional system diagnostics can be performed by the intelligent data processing circuit by recall, interpretation and execution of this additional diagnostic program stored in the mass memory.

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patent: 4371952 (1983-02-01), Schuck

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