Self substrate bias generator formed in a well

Details Self substrate bias generator formed in a well Self substrate bias generator formed in a well

1986-09-16

1988-04-26

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200B, 307297, 307445, H03K 301, H03K 1920

Patent

active

047407158

ABSTRACT:
The invention relates to a self substrate bias generator. A well is formed in a semiconductor substrate. The first capacitor is connected between the terminal to which the first clock signal is supplied and the first node. The second capacitor is connected between the terminal to which the second clock signal, which has an opposite phase to the first signal, is supplied and the second node. The first to fourth transistors are formed in the well. For the first transistor, a current path is connected between the substrate and the first node and its gate is connected to the first node. For the second transistor, a current path is connected between the substrate and the second node and its gate is connected to the second node. For the third transistor, a current path is connected between a predetermined potential and the first node and its gate is connected to the second node. For the fourth transistor, a current path is connected between the predetermined potential and the second node and its gate is connected to the first node. If the substrate is of the P type, the charges are pumped from the substrate to the predetermined potential by the generator. In the case of the N-type substrate, the charges are pumped from the predetermined potential into the substrate.

REFERENCES:
patent: 4283642 (1981-08-01), Green
patent: 4307333 (1981-12-01), Hargrove

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