Self-substrate-bias circuit device

Details Self-substrate-bias circuit device Self-substrate-bias circuit device

1981-09-21

1985-01-01

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307303, 357 23, H01L 2704, H01L 2994, H03L 100

Patent

active

044917465

ABSTRACT:
A self-substrate-bias circuit device comprising substrate of P conductivity type, a capacitor element of MOS construction formed in said semiconductor substrate and whose one end is connected to the output terminal of a pulse generator, a diode element formed in said semiconductor substrate and connected between the other end of said capacitor element and a ground potential, and an P.sup.+ region of P conductivity type formed in the region of said seminconductor substrate which is contacted to said capacitor element and having higher impurity concentration than that of said semiconductor substrate.

REFERENCES:
patent: 4007478 (1977-02-01), Yagi
patent: 4016594 (1977-04-01), Shappir
patent: 4044373 (1977-08-01), Nomiya et al.
patent: 4115794 (1978-09-01), De La Moneda
patent: 4216489 (1980-08-01), Clemens et al.
patent: 4255756 (1981-03-01), Shimotori et al.
patent: 4377756 (1983-03-01), Yoshihara et al.

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