Self-shadowing MEM structures

Optical: systems and elements – Mirror

Reexamination Certificate

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Details

C359S883000, C359S884000, C385S016000, C385S018000

Reexamination Certificate

active

06824278

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to microelectromechanical systems (MEMS), and more particularly to the design and fabrication of bond pads, fuses, compliant members and other MEMS structures portions of which preferably remain non-metalized.
BACKGROUND OF THE INVENTION
MEMS can include numerous electromechanical devices fabricated on a single substrate, many of which are to be separately actuated in order to achieve a desired operation. For example, a MEMS optical switch may include numerous mirrors that are each positionable in a desired orientation for reflecting optical signals between originating and target locations upon actuation of one or more microactuators associated with each mirror. In order for each mirror to be separately positioned, separate control signals need to be supplied to the microactuators associated with each mirror. One manner of accomplishing this is to connect each microactuator to a control signal source with a separate electrical conductor (i.e., an interconnect line) fabricated on the surface of the substrate that extends between its associated microactuator and a bond pad at the periphery of the substrate where it can be easily connected to an off-chip control signal source. In this regard, since there are numerous interconnect lines, there are typically numerous bond pads arranged in close proximity to each other along the periphery of the substrate.
In fabricating the multiple bond pads it may be desirable to employ a blanket metalization process step wherein the entire region of the substrate where the bond pads are located is covered with gold or another highly conductive material rather than trying to employ a shadow mask that restricts application of the metal to only the surfaces of the individual bond pads. However, such blanket metalization has the drawback that it may lead to short circuit conditions. For example, if the interconnect lines are electrically isolated from each other by overlying shield structures, the shield structures cannot contact the bond pads and thus must end prior to the bond pads thereby exposing the interconnect lines for a short distance in the gaps between the bond pads and the ends of the shield structures. Thus, if blanket metalization is employed, the exposed portions of the interconnect lines may receive undesired metalization leading to short circuits between individual interconnect lines and their associated shield structures or between adjacent interconnect lines. Furthermore, even if blanket metalization is not employed, slight misalignment of an appropriately configured shadow mask can also result in undesired metalization of the exposed portions of the interconnect lines.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides self-shadowed microelectromechanical structures such as self-shadowed bond pads, fuses and compliant members (e.g., springs) and a method of fabricating self-shadowing microelectromechanical structures that anticipate and accommodate blanket metalization process steps. In accordance with the present invention, microelectromechanical structures are designed to incorporate upper level projections (e.g., tabs, cantilevered edges, or the like) that extend laterally outward from upper levels of the structures to shadow an area on the substrate including exposed lower level structures (e.g., ends of interconnect lines, fuse filaments or the like) that are to remain non-metalized. Thus, in accordance with the present invention, the necessary shadow masks are, in effect, incorporated directly into the structures that are fabricated thus allowing for blanket metalization and reducing the likelihood of errant metalization even when shadow masks are used in the metalization process.
According to one aspect of the present invention, a self-shadowed microelectromechanical structure configured for shadowing a portion thereof from undesired metalization during a metalization fabrication process step includes a lower layer of material deposited on a substrate. The lower layer of material may comprise an electrically conductive material, depending upon the requirements of the structures that are to be formed therefrom. In this regard, the substrate may be comprised of silicon covered by a dielectric stack (e.g., a lower layer of silicon oxide and upper layer of silicon nitride) and the electrically conductive material may comprise polysilicon doped with an appropriate material (e.g., phosphorous) to make it electrically conductive. A lower structure is patterned from the lower layer of material. The lower structure includes at least a portion that is to remain non-metalized. An upper layer of material is also deposited on the substrate. The upper layer of material may comprise an electrically conductive material (e.g., doped polysilicon), depending upon the requirements of the structures that are to be formed therefrom. There may be one or more intervening layers of sacrificial material (e.g., silicon oxide or silicate glass) and/or non-sacrificial material (e.g., additional doped polysilicon layers) between the lower and upper layers of electrically conductive material. Further, there may be one or more previously deposited layers (e.g., sacrificial material and/or non-sacrificial material) between the lower layer of material and the substrate. An upper structure is patterned from the upper layer of material. The upper structure includes a laterally extending portion thereof that extends laterally from the upper structure to shadow an area on the substrate that is outside of the main area occupied by the upper structure and that includes the portion of the lower structure that is to remain non-metalized. By way of example, the lower structure may comprise a shielded interconnect line having an exposed portion that is to remain non-metalized and the upper structure may comprise a bond pad area. In one embodiment, the laterally extending portion of the bond pad area comprises a tab extending laterally from an edge of the bond pad area to shadow the exposed portion of the interconnect line and also, preferably, a small area around the exposed portion of the interconnect line. In another embodiment, the entire edge of the bond pad area is cantilevered outward to shadow the exposed portion of the interconnect line and also a larger additional area adjacent to the bond pad area. By way of another example, the lower structure comprises an interconnect line having an exposed portion that is to remain non-metalized and the upper structure comprises a tab extending laterally to shadow the exposed portion of the interconnect line from a post extending upward from a shield structure overlying the interconnect line. By way of further example, the upper structure may comprise a positionable mirror and the lower electrically conductive structure may comprise at least one filament for holding the mirror in place until the filament is severed or at least one compliant member (e.g., a spring) connecting the mirror to other MEM structures (e.g., an actuator arm). In one embodiment, the laterally extending portion of the mirror comprises a tab extending laterally from an edge of the mirror to shadow the filament or compliant member and also, preferably, a small area around the filament or compliant member. In another embodiment the entire edge of the mirror is cantilevered outward to shadow the filament or compliant member and also a larger additional area adjacent to the mirror.
According to another aspect of the present invention, a method for self-shadowing a portion of a microelectromechanical structure fabricated on a substrate from undesired metalization during a metalization fabrication process step begins with depositing a lower layer of material on a substrate (e.g., a silicon substrate have a dielectric stack deposited thereon). Depending upon the requirements of the structures that are to be formed from the lower layer of material, the lower layer of material may be an electrically conductive material (e.g., doped polysilicon). A lower structure (e.g., an int

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