Self-resetting CMOS multiplexer with static output driver

Details Self-resetting CMOS multiplexer with static output driver Self-resetting CMOS multiplexer with static output driver

1994-09-21

1996-09-03

Nelms, David C.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Converging with plural inputs and single output

327408, 327410, 327198, 327219, H03K 1762, H03K 302, H03K 3037

Patent

active

055527450

ABSTRACT:
Output signals from a plurality of self reset CMOS a logic circuits are multiplexed by means of the plurality of input multiplex circuits and an output circuit. The multiplex circuits are individually enabled by means of a select lead and true and complement input signals to the multiplex circuits are supplied to input terminals of an output circuit in which the state of the true or complement input is latched to provide a static output. The inputs to the output circuits simultaneously provide an output and initiate the setting of the latch by means of a separate latch setting gate. An inverter tree within the output circuit maintains the state of the output on the output terminal of the output circuit after the latch has been reset. A test access to the output circuit allows a test signal to be gated into a test latch and subsequently gated into the primary latch of the output circuit to provide a test output. The state of the select signal and of the input signals may be latched in the input circuit for proper pulse alignment.

REFERENCES:
patent: 5155380 (1992-10-01), Hwang et al.
patent: 5164612 (1992-11-01), Kaplinsky
patent: 5250852 (1993-10-01), Ovens et al.
patent: 5280202 (1994-01-01), Chan et al.
patent: 5295174 (1994-03-01), Shimizu

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