Self-planarized gapfilling for shallow trench isolation

Details Self-planarized gapfilling for shallow trench isolation Self-planarized gapfilling for shallow trench isolation

1997-04-09

1998-07-28

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438427, 438435, 438437, 438221, 438296, 148DIG50, H01L 2176

Patent

active

057862621

ABSTRACT:
A new method is disclosed to form a shallow trench isolation with a ozone-TEOS as a gapfilling material. The formation of the shallow trench isolation described herein includes a pad layer, a silicon nitride layer formed on a semiconductor substrate. A thermal oxide layer is subsequently formed on the silicon nitride layer. Then a shallow trench is created via photolithography and dry etching steps to etch the thermal oxide layer, the silicon nitride layer and the pad layer. After photoresist is removed, an ozone-TEOS layer is form in the shallow trench and on the top of the thermal oxide layer for the purpose of isolation. A CMP is perform to make the surface of the substrate with a planar surface. Then, a thermal annealing is used for densification of the ozone-TEOS layer and for forming a lining oxide to provide better isolation.

REFERENCES:
patent: 5498565 (1996-03-01), Gocho et al.
patent: 5578518 (1996-11-01), Koike et al.
patent: 5665635 (1997-09-01), Kwon et al.

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