Electric power conversion systems – Current conversion – Using semiconductor-type converter
Reexamination Certificate
2001-01-19
2001-10-09
Han, Jessica (Department: 2838)
Electric power conversion systems
Current conversion
Using semiconductor-type converter
C363S021060, C363S021140, C363S088000, C363S091000
Reexamination Certificate
active
06301139
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to DC-to-DC power converter circuits, and more particularly, to a power converter having a self-driven synchronous rectifier circuit for a non-optimal reset secondary voltage that remains at a zero voltage level during a portion of a switching cycle.
2. Description of Related Art
Self-driven synchronous rectification circuits are known in the art for providing rectification of a voltage that alternates between positive and negative values in a DC-to-DC power converter circuit. An example of a conventional self-driven synchronous rectification circuit is provided in FIG.
1
.
More specifically, the self-driven synchronous rectification circuit of
FIG. 1
is provided on the secondary side of a transformer
20
having a primary winding
22
and a secondary winding
24
. The self-driven synchronous recification circuit includes first and second rectifiers
12
,
14
that are each provided by MOSFET devices, e.g., n-channel enhancement-type MOSFETs. The first rectifier
12
has a drain terminal connected to a first end A of the transformer secondary winding
24
and the second rectifier
14
has a drain terminal connected to a second end B of the transformer secondary winding. The gate terminal of the first rectifier
12
is connected to the second end B of the transformer secondary winding through a current limiting resistor
16
and to ground through resistor
17
. The gate terminal of the second rectifier
14
is connected to the first end A of the transformer secondary winding through a current limiting resistor
18
and to ground through resistor
19
. The source terminals of the first and second rectifiers
12
,
14
are coupled to ground. The synchronous rectification circuit provides an output voltage (V
OUT
) between a positive terminal and ground. The positive terminal is coupled to the second end B of the transformer through output storage choke
26
. A capacitor
28
is coupled between the positive terminal and ground to filter high frequency components of the rectified output voltage (V
OUT
).
The operation of the self-driven synchronous rectification circuit of
FIG. 1
is illustrated with respect to the timing diagram of
FIG. 2
a,
which depicts the voltage between the B and A ends of the secondary winding of the transformer (V
B−A
). In
FIG. 2
a,
the voltage V
B−A
is illustrated as a series of rectangular pulses having a predetermined duty cycle that alternates between a positive voltage and a negative voltage. When the voltage V
B−A
is positive, i.e., the voltage at end B is positive with respect to the voltage at end A, the first rectifier
12
is turned on and the second rectifier
14
is turned off. This causes a current path to form through the first rectifier
12
, the transformer secondary winding
24
, and the storage choke
26
to deliver power to the output terminals. Conversely, when the voltage V
B−A
is negative, i.e., the voltage at end B is negative with respect to the voltage at end A, the first rectifier
12
is turned off and the second rectifier
14
is turned on. This causes a path for magnetization current stored in the choke
26
during the previous part of the cycle through the second rectifier
14
and the storage choke
26
to the output terminals.
Power is delivered to the secondary side of the transformer only during the positive part of the cycle. The negative part of the cycle is used to reset the transformer. The first rectifier
12
is generally known as the “forward” synchronous rectifier since it is used to conduct current to the output terminals from the transformer
20
during the positive part of the power cycle. The second rectifier
14
is generally known as the “free-wheeling” synchronous rectifier since it is used to conduct current to the output terminals during the negative part of the cycle while the transformer
20
is resetting. When operated with the secondary voltage depicted in
FIG. 2
a,
the gate drives of the rectifiers
12
,
14
are synchronized with current flow through the body diodes of the MOSFET devices. In other words, very little current flows through the body diodes of the MOSFET devices when the secondary voltage has an “optimum reset” waveform in the form of
FIG. 2
a.
A significant drawback of the self-driven synchronous rectification circuit of
FIG. 1
is that its efficiency is substantially degraded when MOSFET devices are driven by a “non-optimal reset” secondary voltage across the transformer
20
.
FIG. 2
b
depicts a “non-optimal reset” secondary voltage waveform in which the voltage V
B−A
remains at the zero level during a portion of one switching cycle. Specifically, the zero voltage state occurs after the negative voltage state (reset) and before the next positive voltage state. When the secondary voltage V
B−A
is zero, both the first rectifier
12
and the second rectifier
14
are turned off. Magnetization current of the storage choke
26
is conducted through the body diode of the second rectifier
14
during the zero voltage portion of the switching cycle. It is undesirable for the body diodes of the MOSFET devices
12
,
14
to conduct current during a substantial portion of the switching cycle since they cause a voltage drop that results in substantial power loss, i.e., reduced efficiency.
Accordingly, it would be desirable to provide a power converter having a self-driven synchronous rectification circuit that overcomes these and other disadvantages of the prior art.
SUMMARY OF THE INVENTION
The invention is directed to a power converter having a self-driven synchronous rectification circuit that can operate efficiently with a non-optimal reset secondary voltage waveform that remains at a zero voltage level during a portion of the switching cycle.
More particularly, the power converter circuit comprises a transformer having a primary winding and a secondary winding, in which primary winding is supplied with a non-optimal reset waveform that remains at a zero voltage level for a portion of a power cycle thereof. A first synchronous rectifier is connected in series with the first end of the secondary winding and is controlled by a voltage at the second end of the secondary winding. A second synchronous rectifier is connected in series with the second end of the secondary winding, and is further connected to an output terminal of the power converter circuit through a storage choke. A saturable reactor is connected in series between the first synchronous rectifier and the first end of the secondary winding. A switching device is connected to the first end of the secondary winding and is controlled by the voltage at the second end of the secondary winding. The switching device further controls the second synchronous rectifier. A capacitor is connected to the second synchronous rectifier, and is charged by operation of the switching device to maintain the second synchronous rectifier in a conductive state during the zero voltage level portion of the non-optimal reset waveform. Upon transition to a positive voltage level portion of the waveform following the zero voltage level portion, the capacitor discharges through the switching device. The saturable reactor precludes current from flowing through the first synchronous rectifier for a period of time sufficient to allow the capacitor to discharge.
In an embodiment of the invention, the first synchronous rectifier further comprises a first MOSFET having a drain terminal connected to the first end of the secondary winding through the saturable reactor, a gate terminal connected to the second end of the secondary winding, and a source terminal connected to ground. The second synchronous rectifier further comprises a second MOSFET having a drain terminal connected to the second end of the secondary winding, a gate terminal, and a source terminal connected to ground. The drain terminal of the second MOSFET is further connected to the output terminal of the power converter circuit through the storage choke. The switching
Han Jessica
O'Melveny & Myers LLP
Power-One, Inc.
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