Self-correcting serial baud/bit alignment

Details Self-correcting serial baud/bit alignment Self-correcting serial baud/bit alignment

1990-03-12

1991-10-15

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

328 72, H04L 700

Patent

active

050581406

ABSTRACT:
Described is a circuit arrangement that aligns the receiver of a communications device with the bit boundaries of a serially received data stream. The circuit arrangement delays a bit in a synchronized data stream and correlates it with a next bit in the data stream. If the bits are equal, a signal is generated to reset a synchronization latch. Thereafter, the receiver is synchronized to the incoming data.

REFERENCES:
patent: 4740962 (1988-04-01), Kish
patent: 4744081 (1988-05-01), Buckland
patent: 4754457 (1988-06-01), Bright et al.
patent: 4763341 (1988-08-01), Murphy
patent: 4847877 (1989-07-01), Besseyre
patent: 4868853 (1989-09-01), Izumita et al.
patent: 4879731 (1989-11-01), Brush
patent: 4910754 (1990-03-01), Allen et al.

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