Self-correcting semiconductor memory device and microcomputer in

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371 13, 371 691, G06F 1110

Patent

active

049013203

ABSTRACT:
In a nonvolatile memory device or a microcomputer with a nonvolatile memory, data errors arising from loss of charge in the floating gates of memory cells are detected and corrected by applying two different sense voltages to the memory cells and comparing the outputs. Instead of using a cumbersome error-correcting code, this error-correcting scheme requires only one parity bit per word, yet it can detect and correct errors in any odd number of bits. Benefits include reduced chip size and longer life for electrically erasable and programmable memories.

REFERENCES:
patent: 3531769 (1970-09-01), Montgomery et al.
patent: 3582880 (1971-06-01), Beausoleit
Nikkei Electronics, Sep. 26, 1983, pp. 195-210; "High Speed 1M-bit Mask Rom with build-in ECC Circuit for Improved Yield"; Shibata, et al.

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