Self-clocking binary receiver

Details Self-clocking binary receiver Self-clocking binary receiver

1982-12-08

1985-01-29

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

329106, 375110, 375113, H04L 706

Patent

active

044970609

ABSTRACT:
Binary data is transmitted as signals of two different pulsewidths to respectively represent logic "0" and "1". At the data receiver, the ratio of the pulsewidths is converted into a corresponding voltage ratio, which, in turn, is applied through a voltage divider to develop clock- and data-control signals at two different levels. Switching devices are respectively actuated whenever the clock- and data-control signals reach preset voltage levels to respectively produce self-synchronized clock and data pulses corresponding to the received binary data.

REFERENCES:
patent: 3281806 (1966-10-01), Lawrance et al.
patent: 3510780 (1970-05-01), Buehrle
patent: 3949199 (1976-04-01), Odom

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