Self clocking binary information encoder

Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses

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341 52, 360 44, H03M 506

Patent

active

049510495

ABSTRACT:
An electrical circuit suitable for encoding binary information, in accordance with a novel modulation method, is provided. The encoder circuit includes: a clock driver; an n-phase counter driven by the clock driver for producing a succession of event-cells, wherein each event-cell is demarcated by a pair of similar, unique clock transitions; first logic circuitry for generating a first transitional event in a first event-cell in response to a first information; and second logic circuitry for generating a second transitional event in a second event-cell in response to a second information, the first transitional event and the second transitional event differing by the number of transitions occurring per event-cell. A specific, preferred encoder circuit embodiment is set forth.

REFERENCES:
patent: 3961367 (1976-06-01), Wu
patent: 4173026 (1979-10-01), Deming

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