Self clock generation structure for low power local clock...

Details Self clock generation structure for low power local clock... Self clock generation structure for low power local clock...

2004-05-13

2010-12-28

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Pulse code modulation

C375S147000, C375S262000, C375S328000

Reexamination Certificate

active

07860172

ABSTRACT:
A k-to-2kdecoder is provided. Within the final stage of a k-to-2kdecoder is a plurality of word line drivers. These word line drivers utilize clocking signals to fire word lines to a memory array. However, power consumption by clocks has become a serious issue with the increase component density on silicon wafers. To alleviate the problem, signals from the first stage of the k-to-2kdecoder provide enablement signals to Local Clock Buffers (LCBs) that allow the word line drivers to fire. The enablement signal reduces the number of active buffers and signals carried to word line drivers, reducing power consumption.

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