Self-checking random access memory

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Details

371 211, G11C 2900

Patent

active

049127101

ABSTRACT:
A random access memory including address error checking. The random access memory includes an address decoder that activates data cells from among the plurality of data cells in the memory. The random access memory also includes an address encoder that supplies an address determined by the data cells activated. The address from the encoder is compared with the address input to the decoder and if the two address are different an error indication is provided.

REFERENCES:
patent: 3008129 (1961-11-01), Katz
patent: 3049692 (1962-08-01), Hunt
patent: 3751649 (1973-08-01), Hart, Jr.
patent: 3940601 (1976-02-01), Henry et al.
patent: 4667330 (1987-05-01), Kumagai

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